diff options
Diffstat (limited to 'tcl/target/at91samdXX.cfg')
-rw-r--r-- | tcl/target/at91samdXX.cfg | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/tcl/target/at91samdXX.cfg b/tcl/target/at91samdXX.cfg new file mode 100644 index 0000000..0a1ef26 --- /dev/null +++ b/tcl/target/at91samdXX.cfg @@ -0,0 +1,61 @@ +# +# script for ATMEL samdXX, a CORTEX-M0 chip +# + +# +# samdXX devices only support SWD transports. +# +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME at91samd +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +# By default use 2kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x800 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +$_TARGETNAME configure -event gdb-flash-erase-start { + halt +} + +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz +# +# Since we may be running of an RC oscilator, we crank down the speed a +# bit more to be on the safe side. Perhaps superstition, but if are +# running off a crystal, we can run closer to the limit. Note +# that there can be a pretty wide band where things are more or less stable. + +adapter_khz 500 +adapter_nsrst_delay 100 + +# if srst is not fitted use SYSRESETREQ to +# perform a soft reset +cortex_m reset_config sysresetreq + +# no flash defined yet |