diff options
Diffstat (limited to 'tcl/board')
-rw-r--r-- | tcl/board/vd_a53x2_dap.cfg | 19 | ||||
-rw-r--r-- | tcl/board/vd_a53x2_jtag.cfg | 20 | ||||
-rw-r--r-- | tcl/board/vd_a75x4_dap.cfg | 30 | ||||
-rw-r--r-- | tcl/board/vd_a75x4_jtag.cfg | 30 | ||||
-rw-r--r-- | tcl/board/vd_m4_dap.cfg | 14 | ||||
-rw-r--r-- | tcl/board/vd_m4_jtag.cfg | 15 | ||||
-rw-r--r-- | tcl/board/vd_m7_jtag.cfg | 15 |
7 files changed, 101 insertions, 42 deletions
diff --git a/tcl/board/vd_a53x2_dap.cfg b/tcl/board/vd_a53x2_dap.cfg index 4cf5594..bcf8b44 100644 --- a/tcl/board/vd_a53x2_dap.cfg +++ b/tcl/board/vd_a53x2_dap.cfg @@ -4,10 +4,13 @@ source [find interface/vdebug.cfg] -set _CORES 2 -set _CHIPNAME a53 -set _MEMSTART 0x00000000 -set _MEMSIZE 0x1000000 +set CORES 2 +set CHIPNAME a53 +set ACCESSPORT 0 +set MEMSTART 0x00000000 +set MEMSIZE 0x1000000 +set DBGBASE {0x80810000 0x80910000} +set CTIBASE {0x80820000 0x80920000} # vdebug select transport transport select dapdirect_swd @@ -19,11 +22,9 @@ adapter srst delay 5 # BFM hierarchical path and input clk period vdebug bfm_path tbench.u_vd_swdp_bfm 10ns -# DMA Memories to access backdoor (up to 4) -vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE +# DMA Memories to access backdoor (up to 20) +vdebug mem_path tbench.u_memory.mem_array $MEMSTART $MEMSIZE -source [find target/swj-dp.tcl] - -swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf +swd newdap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf source [find target/vd_aarch64.cfg] diff --git a/tcl/board/vd_a53x2_jtag.cfg b/tcl/board/vd_a53x2_jtag.cfg index a5e8d24..0c3eebd 100644 --- a/tcl/board/vd_a53x2_jtag.cfg +++ b/tcl/board/vd_a53x2_jtag.cfg @@ -4,11 +4,14 @@ source [find interface/vdebug.cfg] -set _CORES 2 -set _CHIPNAME a53 -set _MEMSTART 0x00000000 -set _MEMSIZE 0x1000000 -set _CPUTAPID 0x5ba00477 +set CORES 2 +set CHIPNAME a53 +set ACCESSPORT 0 +set MEMSTART 0x00000000 +set MEMSIZE 0x1000000 +set DBGBASE {0x80810000 0x80910000} +set CTIBASE {0x80820000 0x80920000} +set CPUTAPID 0x5ba00477 # vdebug select transport transport select jtag @@ -21,11 +24,10 @@ adapter srst delay 5 # BFM hierarchical path and input clk period vdebug bfm_path tbench.u_vd_jtag_bfm 10ns -# DMA Memories to access backdoor (up to 4) -vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +# DMA Memories to access backdoor (up to 20) +vdebug mem_path tbench.u_memory.mem_array $MEMSTART $MEMSIZE +jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID jtag arp_init-reset source [find target/vd_aarch64.cfg] diff --git a/tcl/board/vd_a75x4_dap.cfg b/tcl/board/vd_a75x4_dap.cfg new file mode 100644 index 0000000..5c2a2ef --- /dev/null +++ b/tcl/board/vd_a75x4_dap.cfg @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# Cadence virtual debug interface +# Arm Cortex A53x2 through DAP + +source [find interface/vdebug.cfg] + +set CORES 4 +set CHIPNAME a75 +set ACCESSPORT 0x00040000 +set MEMSTART 0x00000000 +set MEMSIZE 0x1000000 +set DBGBASE {0x01010000 0x01110000 0x01210000 0x01310000} +set CTIBASE {0x01020000 0x01120000 0x01220000 0x01320000} + +# vdebug select transport +transport select dapdirect_swd + +# JTAG reset config, frequency and reset delay +adapter speed 200000 +adapter srst delay 5 + +# BFM hierarchical path and input clk period +vdebug bfm_path tbench.u_vd_dap6_bfm 2250ps + +# DMA Memories to access backdoor (up to 20) +#vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE + +swd newdap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf + +source [find target/vd_aarch64.cfg] diff --git a/tcl/board/vd_a75x4_jtag.cfg b/tcl/board/vd_a75x4_jtag.cfg new file mode 100644 index 0000000..c94a719 --- /dev/null +++ b/tcl/board/vd_a75x4_jtag.cfg @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# Cadence virtual debug interface +# Arm Cortex A53x2 through DAP + +source [find interface/vdebug.cfg] + +set CORES 4 +set CHIPNAME a75 +set ACCESSPORT 0x00040000 +set MEMSTART 0x00000000 +set MEMSIZE 0x1000000 +set DBGBASE {0x01010000 0x01110000 0x01210000 0x01310000} +set CTIBASE {0x01020000 0x01120000 0x01220000 0x01320000} +set CPUTAPID 0x4ba06477 + +# vdebug select transport +transport select jtag + +# JTAG reset config, frequency and reset delay +reset_config trst_and_srst +adapter speed 1500000 +adapter srst delay 5 + +# BFM hierarchical path and input clk period +vdebug bfm_path tbench.u_vd_jtag_bfm 333ps + +jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID +jtag arp_init-reset + +source [find target/vd_aarch64.cfg] diff --git a/tcl/board/vd_m4_dap.cfg b/tcl/board/vd_m4_dap.cfg index 691b623..5d3605a 100644 --- a/tcl/board/vd_m4_dap.cfg +++ b/tcl/board/vd_m4_dap.cfg @@ -4,9 +4,9 @@ source [find interface/vdebug.cfg] -set _CHIPNAME m4 -set _MEMSTART 0x00000000 -set _MEMSIZE 0x10000 +set CHIPNAME m4 +set MEMSTART 0x00000000 +set MEMSIZE 0x10000 # vdebug select transport transport select dapdirect_swd @@ -16,11 +16,9 @@ adapter srst delay 5 # BFM hierarchical path and input clk period vdebug bfm_path tbench.u_vd_swdp_bfm 20ns -# DMA Memories to access backdoor (up to 4) -vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $_MEMSTART $_MEMSIZE +# DMA Memories to access backdoor (up to 20) +vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $MEMSTART $MEMSIZE -source [find target/swj-dp.tcl] - -swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf +swd newdap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf source [find target/vd_cortex_m.cfg] diff --git a/tcl/board/vd_m4_jtag.cfg b/tcl/board/vd_m4_jtag.cfg index 4c795eb..3b32e17 100644 --- a/tcl/board/vd_m4_jtag.cfg +++ b/tcl/board/vd_m4_jtag.cfg @@ -4,10 +4,10 @@ source [find interface/vdebug.cfg] -set _CHIPNAME m4 -set _MEMSTART 0x00000000 -set _MEMSIZE 0x10000 -set _CPUTAPID 0x4ba00477 +set CHIPNAME m4 +set MEMSTART 0x00000000 +set MEMSIZE 0x10000 +set CPUTAPID 0x4ba00477 # vdebug select transport transport select jtag @@ -20,11 +20,10 @@ adapter srst delay 5 # BFM hierarchical path and input clk period vdebug bfm_path tbench.u_vd_jtag_bfm 20ns -# DMA Memories to access backdoor (up to 4) -vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $_MEMSTART $_MEMSIZE - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +# DMA Memories to access backdoor (up to 20) +vdebug mem_path tbench.u_mcu.u_sys.u_rom.rom $MEMSTART $MEMSIZE +jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID jtag arp_init-reset source [find target/vd_cortex_m.cfg] diff --git a/tcl/board/vd_m7_jtag.cfg b/tcl/board/vd_m7_jtag.cfg index 880ef9b..9a89584 100644 --- a/tcl/board/vd_m7_jtag.cfg +++ b/tcl/board/vd_m7_jtag.cfg @@ -4,10 +4,10 @@ source [find interface/vdebug.cfg] -set _CHIPNAME m7 -set _MEMSTART 0x00000000 -set _MEMSIZE 0x100000 -set _CPUTAPID 0x0ba02477 +set CHIPNAME m7 +set MEMSTART 0x00000000 +set MEMSIZE 0x100000 +set CPUTAPID 0x0ba02477 # vdebug select JTAG transport transport select jtag @@ -20,11 +20,10 @@ adapter srst delay 5 # BFM hierarchical path and input clk period vdebug bfm_path tbench.u_vd_jtag_bfm 10ns -# DMA Memories to access backdoor (up to 4) -vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $_MEMSTART $_MEMSIZE - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +# DMA Memories to access backdoor (up to 20) +vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $MEMSTART $MEMSIZE +jtag newtap $CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $CPUTAPID jtag arp_init-reset source [find target/vd_cortex_m.cfg] |