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-rw-r--r--src/target/xtensa/xtensa.c10
-rw-r--r--src/target/xtensa/xtensa.h4
-rw-r--r--src/target/xtensa/xtensa_chip.c2
-rw-r--r--src/target/xtensa/xtensa_debug_module.h2
4 files changed, 10 insertions, 8 deletions
diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c
index f7c82ef..8369cc4 100644
--- a/src/target/xtensa/xtensa.c
+++ b/src/target/xtensa/xtensa.c
@@ -331,7 +331,7 @@ union xtensa_reg_val_u {
uint8_t buf[4];
};
-static const struct xtensa_keyval_info_s xt_qerr[XT_QERR_NUM] = {
+static const struct xtensa_keyval_info xt_qerr[XT_QERR_NUM] = {
{ .chrval = "E00", .intval = ERROR_FAIL },
{ .chrval = "E01", .intval = ERROR_FAIL },
{ .chrval = "E02", .intval = ERROR_COMMAND_ARGUMENT_INVALID },
@@ -540,7 +540,7 @@ static void xtensa_queue_exec_ins_wide(struct xtensa *xtensa, uint8_t *ops, uint
for (int32_t i = oplenw - 1; i > 0; i--)
xtensa_queue_dbg_reg_write(xtensa,
XDMREG_DIR0 + i,
- target_buffer_get_u32(xtensa->target, &ops_padded[sizeof(uint32_t)*i]));
+ target_buffer_get_u32(xtensa->target, &ops_padded[sizeof(uint32_t) * i]));
/* Write DIR0EXEC last */
xtensa_queue_dbg_reg_write(xtensa,
XDMREG_DIR0EXEC,
@@ -3966,10 +3966,10 @@ COMMAND_HELPER(xtensa_cmd_xtreg_do, struct xtensa *xtensa)
rptr->type = XT_REG_OTHER;
}
- /* Register flags */
+ /* Register flags: includes intsetN, intclearN for LX8 */
if ((strcmp(rptr->name, "mmid") == 0) || (strcmp(rptr->name, "eraccess") == 0) ||
- (strcmp(rptr->name, "ddr") == 0) || (strcmp(rptr->name, "intset") == 0) ||
- (strcmp(rptr->name, "intclear") == 0))
+ (strcmp(rptr->name, "ddr") == 0) || (strncmp(rptr->name, "intset", 6) == 0) ||
+ (strncmp(rptr->name, "intclear", 8) == 0) || (strcmp(rptr->name, "mesrclr") == 0))
rptr->flags = XT_REGF_NOREAD;
else
rptr->flags = 0;
diff --git a/src/target/xtensa/xtensa.h b/src/target/xtensa/xtensa.h
index a220021..1d56f83 100644
--- a/src/target/xtensa/xtensa.h
+++ b/src/target/xtensa/xtensa.h
@@ -97,7 +97,7 @@ enum xtensa_ar_scratch_set_e {
XT_AR_SCRATCH_NUM
};
-struct xtensa_keyval_info_s {
+struct xtensa_keyval_info {
char *chrval;
int intval;
};
@@ -283,7 +283,7 @@ struct xtensa {
bool halt_request;
uint32_t nx_stop_cause;
uint32_t nx_reg_idx[XT_NX_REG_IDX_NUM];
- struct xtensa_keyval_info_s scratch_ars[XT_AR_SCRATCH_NUM];
+ struct xtensa_keyval_info scratch_ars[XT_AR_SCRATCH_NUM];
bool regs_fetched; /* true after first register fetch completed successfully */
};
diff --git a/src/target/xtensa/xtensa_chip.c b/src/target/xtensa/xtensa_chip.c
index ac4a49c..ce6d35c 100644
--- a/src/target/xtensa/xtensa_chip.c
+++ b/src/target/xtensa/xtensa_chip.c
@@ -103,7 +103,7 @@ static int xtensa_chip_target_create(struct target *target, Jim_Interp *interp)
LOG_DEBUG("DAP: ap_num %" PRId64 " DAP %p\n", pc->ap_num, pc->dap);
} else {
xtensa_chip_dm_cfg.tap = target->tap;
- LOG_DEBUG("JTAG: %s:%s pos %d", target->tap->chip, target->tap->tapname,
+ LOG_DEBUG("JTAG: %s:%s pos %u", target->tap->chip, target->tap->tapname,
target->tap->abs_chain_position);
}
diff --git a/src/target/xtensa/xtensa_debug_module.h b/src/target/xtensa/xtensa_debug_module.h
index 495da2a..8391a96 100644
--- a/src/target/xtensa/xtensa_debug_module.h
+++ b/src/target/xtensa/xtensa_debug_module.h
@@ -75,6 +75,7 @@ enum xtensa_dm_reg {
XDMREG_DELAYCNT,
XDMREG_MEMADDRSTART,
XDMREG_MEMADDREND,
+ XDMREG_DEBUGPC,/*Unsupported, undocumented, may not be present*/
XDMREG_EXTTIMELO,
XDMREG_EXTTIMEHI,
XDMREG_TRAXRSVD48,
@@ -184,6 +185,7 @@ struct xtensa_dm_reg_offsets {
{ .nar = 0x07, .apb = 0x001c }, /* XDMREG_DELAYCNT */ \
{ .nar = 0x08, .apb = 0x0020 }, /* XDMREG_MEMADDRSTART */ \
{ .nar = 0x09, .apb = 0x0024 }, /* XDMREG_MEMADDREND */ \
+ { .nar = 0x0f, .apb = 0x003c }, /* XDMREG_DEBUGPC */ \
{ .nar = 0x10, .apb = 0x0040 }, /* XDMREG_EXTTIMELO */ \
{ .nar = 0x11, .apb = 0x0044 }, /* XDMREG_EXTTIMEHI */ \
{ .nar = 0x12, .apb = 0x0048 }, /* XDMREG_TRAXRSVD48 */ \