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Diffstat (limited to 'src/target/cortex_m.c')
-rw-r--r--src/target/cortex_m.c64
1 files changed, 29 insertions, 35 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index ebc3bac..87a8845 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -50,63 +50,63 @@
/* Supported Cortex-M Cores */
static const struct cortex_m_part_info cortex_m_parts[] = {
{
- .partno = CORTEX_M0_PARTNO,
+ .impl_part = CORTEX_M0_PARTNO,
.name = "Cortex-M0",
.arch = ARM_ARCH_V6M,
},
{
- .partno = CORTEX_M0P_PARTNO,
+ .impl_part = CORTEX_M0P_PARTNO,
.name = "Cortex-M0+",
.arch = ARM_ARCH_V6M,
},
{
- .partno = CORTEX_M1_PARTNO,
+ .impl_part = CORTEX_M1_PARTNO,
.name = "Cortex-M1",
.arch = ARM_ARCH_V6M,
},
{
- .partno = CORTEX_M3_PARTNO,
+ .impl_part = CORTEX_M3_PARTNO,
.name = "Cortex-M3",
.arch = ARM_ARCH_V7M,
.flags = CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K,
},
{
- .partno = CORTEX_M4_PARTNO,
+ .impl_part = CORTEX_M4_PARTNO,
.name = "Cortex-M4",
.arch = ARM_ARCH_V7M,
.flags = CORTEX_M_F_HAS_FPV4 | CORTEX_M_F_TAR_AUTOINCR_BLOCK_4K,
},
{
- .partno = CORTEX_M7_PARTNO,
+ .impl_part = CORTEX_M7_PARTNO,
.name = "Cortex-M7",
.arch = ARM_ARCH_V7M,
.flags = CORTEX_M_F_HAS_FPV5,
},
{
- .partno = CORTEX_M23_PARTNO,
+ .impl_part = CORTEX_M23_PARTNO,
.name = "Cortex-M23",
.arch = ARM_ARCH_V8M,
},
{
- .partno = CORTEX_M33_PARTNO,
+ .impl_part = CORTEX_M33_PARTNO,
.name = "Cortex-M33",
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
{
- .partno = CORTEX_M35P_PARTNO,
+ .impl_part = CORTEX_M35P_PARTNO,
.name = "Cortex-M35P",
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
{
- .partno = CORTEX_M55_PARTNO,
+ .impl_part = CORTEX_M55_PARTNO,
.name = "Cortex-M55",
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
},
{
- .partno = STAR_MC1_PARTNO,
+ .impl_part = STAR_MC1_PARTNO,
.name = "STAR-MC1",
.arch = ARM_ARCH_V8M,
.flags = CORTEX_M_F_HAS_FPV5,
@@ -1214,7 +1214,7 @@ static int cortex_m_restore_one(struct target *target, bool current,
struct reg *r;
if (target->state != TARGET_HALTED) {
- LOG_TARGET_ERROR(target, "target not halted");
+ LOG_TARGET_ERROR(target, "not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -1391,7 +1391,7 @@ static int cortex_m_step(struct target *target, int current,
bool isr_timed_out = false;
if (target->state != TARGET_HALTED) {
- LOG_TARGET_WARNING(target, "target not halted");
+ LOG_TARGET_ERROR(target, "not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -2046,8 +2046,14 @@ int cortex_m_add_watchpoint(struct target *target, struct watchpoint *watchpoint
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
- /* hardware doesn't support data value masking */
- if (watchpoint->mask != ~(uint32_t)0) {
+ /* REVISIT This DWT may well be able to watch for specific data
+ * values. Requires comparator #1 to set DATAVMATCH and match
+ * the data, and another comparator (DATAVADDR0) matching addr.
+ *
+ * NOTE: hardware doesn't support data value masking, so we'll need
+ * to check that mask is zero
+ */
+ if (watchpoint->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK) {
LOG_TARGET_DEBUG(target, "watchpoint value masks not supported");
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@@ -2068,18 +2074,6 @@ int cortex_m_add_watchpoint(struct target *target, struct watchpoint *watchpoint
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
- /* Caller doesn't seem to be able to describe watching for data
- * values of zero; that flags "no value".
- *
- * REVISIT This DWT may well be able to watch for specific data
- * values. Requires comparator #1 to set DATAVMATCH and match
- * the data, and another comparator (DATAVADDR0) matching addr.
- */
- if (watchpoint->value) {
- LOG_TARGET_DEBUG(target, "data value watchpoint not YET supported");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
cortex_m->dwt_comp_available--;
LOG_TARGET_DEBUG(target, "dwt_comp_available: %d", cortex_m->dwt_comp_available);
@@ -2092,7 +2086,7 @@ int cortex_m_remove_watchpoint(struct target *target, struct watchpoint *watchpo
/* REVISIT why check? DWT can be updated with core running ... */
if (target->state != TARGET_HALTED) {
- LOG_TARGET_WARNING(target, "target not halted");
+ LOG_TARGET_ERROR(target, "not halted");
return ERROR_TARGET_NOT_HALTED;
}
@@ -2532,18 +2526,18 @@ int cortex_m_examine(struct target *target)
if (retval != ERROR_OK)
return retval;
- /* Get ARCH and CPU types */
- const enum cortex_m_partno core_partno = (cpuid & ARM_CPUID_PARTNO_MASK) >> ARM_CPUID_PARTNO_POS;
+ /* Inspect implementor/part to look for recognized cores */
+ unsigned int impl_part = cpuid & (ARM_CPUID_IMPLEMENTOR_MASK | ARM_CPUID_PARTNO_MASK);
for (unsigned int n = 0; n < ARRAY_SIZE(cortex_m_parts); n++) {
- if (core_partno == cortex_m_parts[n].partno) {
+ if (impl_part == cortex_m_parts[n].impl_part) {
cortex_m->core_info = &cortex_m_parts[n];
break;
}
}
if (!cortex_m->core_info) {
- LOG_TARGET_ERROR(target, "Cortex-M PARTNO 0x%x is unrecognized", core_partno);
+ LOG_TARGET_ERROR(target, "Cortex-M CPUID: 0x%x is unrecognized", cpuid);
return ERROR_FAIL;
}
@@ -2555,7 +2549,7 @@ int cortex_m_examine(struct target *target)
(uint8_t)((cpuid >> 0) & 0xf));
cortex_m->maskints_erratum = false;
- if (core_partno == CORTEX_M7_PARTNO) {
+ if (impl_part == CORTEX_M7_PARTNO) {
uint8_t rev, patch;
rev = (cpuid >> 20) & 0xf;
patch = (cpuid >> 0) & 0xf;
@@ -2948,8 +2942,8 @@ COMMAND_HANDLER(handle_cortex_m_mask_interrupts_command)
return retval;
if (target->state != TARGET_HALTED) {
- command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
- return ERROR_OK;
+ command_print(CMD, "Error: target must be stopped for \"%s\" command", CMD_NAME);
+ return ERROR_TARGET_NOT_HALTED;
}
if (CMD_ARGC > 0) {
generated by cgit v1.1 at 2024-10-12 11:17:01 +0000