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Diffstat (limited to 'src/target/arm_dpm.c')
-rw-r--r--src/target/arm_dpm.c70
1 files changed, 34 insertions, 36 deletions
diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 9f3a444..0b2db77 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -59,7 +59,7 @@ static int dpm_mrc(struct target *target, int cpnum,
ARMV4_5_MRC(cpnum, op1, 0, crn, crm, op2),
value);
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
return retval;
}
@@ -82,7 +82,7 @@ static int dpm_mrrc(struct target *target, int cpnum,
ARMV5_T_MRRC(cpnum, op, 0, 1, crm),
value);
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
return retval;
}
@@ -107,7 +107,7 @@ static int dpm_mcr(struct target *target, int cpnum,
ARMV4_5_MCR(cpnum, op1, 0, crn, crm, op2),
value);
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
return retval;
}
@@ -129,7 +129,7 @@ static int dpm_mcrr(struct target *target, int cpnum,
retval = dpm->instr_write_data_r0_r1(dpm,
ARMV5_T_MCRR(cpnum, op, 0, 1, crm), value);
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
return retval;
}
@@ -167,7 +167,7 @@ int arm_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode)
}
/* Read 64bit VFP registers */
-static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
{
int retval = ERROR_FAIL;
uint32_t value_r0, value_r1;
@@ -198,15 +198,14 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
buf_set_u32(r->value + 4, 0, 32, value_r1);
r->valid = true;
r->dirty = false;
- LOG_DEBUG("READ: %s, %8.8x, %8.8x", r->name,
- (unsigned) value_r0, (unsigned) value_r1);
+ LOG_DEBUG("READ: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
}
return retval;
}
/* just read the register -- rely on the core mode being right */
-int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
{
uint32_t value;
int retval;
@@ -266,14 +265,14 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
buf_set_u32(r->value, 0, 32, value);
r->valid = true;
r->dirty = false;
- LOG_DEBUG("READ: %s, %8.8x", r->name, (unsigned) value);
+ LOG_DEBUG("READ: %s, %8.8" PRIx32, r->name, value);
}
return retval;
}
/* Write 64bit VFP registers */
-static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
{
int retval = ERROR_FAIL;
uint32_t value_r0 = buf_get_u32(r->value, 0, 32);
@@ -302,15 +301,14 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum
if (retval == ERROR_OK) {
r->dirty = false;
- LOG_DEBUG("WRITE: %s, %8.8x, %8.8x", r->name,
- (unsigned) value_r0, (unsigned) value_r1);
+ LOG_DEBUG("WRITE: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
}
return retval;
}
/* just write the register -- rely on the core mode being right */
-static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
+static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned int regnum)
{
int retval;
uint32_t value = buf_get_u32(r->value, 0, 32);
@@ -351,7 +349,7 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
if (retval == ERROR_OK) {
r->dirty = false;
- LOG_DEBUG("WRITE: %s, %8.8x", r->name, (unsigned) value);
+ LOG_DEBUG("WRITE: %s, %8.8" PRIx32, r->name, value);
}
return retval;
@@ -388,7 +386,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm)
return retval;
/* read R0 and R1 first (it's used for scratch), then CPSR */
- for (unsigned i = 0; i < 2; i++) {
+ for (unsigned int i = 0; i < 2; i++) {
r = arm->core_cache->reg_list + i;
if (!r->valid) {
retval = arm_dpm_read_reg(dpm, r, i);
@@ -406,7 +404,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm)
arm_set_cpsr(arm, cpsr);
/* REVISIT we can probably avoid reading R1..R14, saving time... */
- for (unsigned i = 2; i < 16; i++) {
+ for (unsigned int i = 2; i < 16; i++) {
r = arm_reg_current(arm, i);
if (r->valid)
continue;
@@ -424,7 +422,7 @@ int arm_dpm_read_current_registers(struct arm_dpm *dpm)
*/
fail:
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
return retval;
}
@@ -503,7 +501,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
* cope with the hand-crafted breakpoint code.
*/
if (arm->target->type->add_breakpoint == dpm_add_breakpoint) {
- for (unsigned i = 0; i < dpm->nbp; i++) {
+ for (unsigned int i = 0; i < dpm->nbp; i++) {
struct dpm_bp *dbp = dpm->dbp + i;
struct breakpoint *bp = dbp->bp;
@@ -515,7 +513,7 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
}
/* enable/disable watchpoints */
- for (unsigned i = 0; i < dpm->nwp; i++) {
+ for (unsigned int i = 0; i < dpm->nwp; i++) {
struct dpm_wp *dwp = dpm->dwp + i;
struct watchpoint *wp = dwp->wp;
@@ -540,9 +538,9 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
did_write = false;
/* check everything except our scratch registers R0 and R1 */
- for (unsigned i = 2; i < cache->num_regs; i++) {
+ for (unsigned int i = 2; i < cache->num_regs; i++) {
struct arm_reg *r;
- unsigned regnum;
+ unsigned int regnum;
/* also skip PC, CPSR, and non-dirty */
if (i == 15)
@@ -627,14 +625,14 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
arm->pc->dirty = false;
/* flush R0 and R1 (our scratch registers) */
- for (unsigned i = 0; i < 2; i++) {
+ for (unsigned int i = 0; i < 2; i++) {
retval = dpm_write_reg(dpm, &cache->reg_list[i], i);
if (retval != ERROR_OK)
goto done;
cache->reg_list[i].dirty = false;
}
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
done:
return retval;
}
@@ -645,7 +643,7 @@ done:
* or MODE_ANY.
*/
static enum arm_mode dpm_mapmode(struct arm *arm,
- unsigned num, enum arm_mode mode)
+ unsigned int num, enum arm_mode mode)
{
enum arm_mode amode = arm->core_mode;
@@ -721,10 +719,10 @@ static int arm_dpm_read_core_reg(struct target *target, struct reg *r,
/* always clean up, regardless of error */
if (mode != ARM_MODE_ANY)
- /* (void) */ arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
+ arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
fail:
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
return retval;
}
@@ -763,10 +761,10 @@ static int arm_dpm_write_core_reg(struct target *target, struct reg *r,
/* always clean up, regardless of error */
if (mode != ARM_MODE_ANY)
- /* (void) */ arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
+ arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
fail:
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
return retval;
}
@@ -795,7 +793,7 @@ static int arm_dpm_full_context(struct target *target)
* Pick some mode with unread registers and read them all.
* Repeat until done.
*/
- for (unsigned i = 0; i < cache->num_regs; i++) {
+ for (unsigned int i = 0; i < cache->num_regs; i++) {
struct arm_reg *r;
if (!cache->reg_list[i].exist || cache->reg_list[i].valid)
@@ -833,7 +831,7 @@ static int arm_dpm_full_context(struct target *target)
} while (did_read);
retval = arm_dpm_modeswitch(dpm, ARM_MODE_ANY);
- /* (void) */ dpm->finish(dpm);
+ dpm->finish(dpm);
done:
return retval;
}
@@ -923,7 +921,7 @@ static int dpm_add_breakpoint(struct target *target, struct breakpoint *bp)
if (bp->type == BKPT_SOFT)
LOG_DEBUG("using HW bkpt, not SW...");
- for (unsigned i = 0; i < dpm->nbp; i++) {
+ for (unsigned int i = 0; i < dpm->nbp; i++) {
if (!dpm->dbp[i].bp) {
retval = dpm_bpwp_setup(dpm, &dpm->dbp[i].bpwp,
bp->address, bp->length);
@@ -942,7 +940,7 @@ static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp)
struct arm_dpm *dpm = arm->dpm;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
- for (unsigned i = 0; i < dpm->nbp; i++) {
+ for (unsigned int i = 0; i < dpm->nbp; i++) {
if (dpm->dbp[i].bp == bp) {
dpm->dbp[i].bp = NULL;
dpm->dbp[i].bpwp.dirty = true;
@@ -956,7 +954,7 @@ static int dpm_remove_breakpoint(struct target *target, struct breakpoint *bp)
return retval;
}
-static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned index_t,
+static int dpm_watchpoint_setup(struct arm_dpm *dpm, unsigned int index_t,
struct watchpoint *wp)
{
int retval;
@@ -999,7 +997,7 @@ static int dpm_add_watchpoint(struct target *target, struct watchpoint *wp)
int retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
if (dpm->bpwp_enable) {
- for (unsigned i = 0; i < dpm->nwp; i++) {
+ for (unsigned int i = 0; i < dpm->nwp; i++) {
if (!dpm->dwp[i].wp) {
retval = dpm_watchpoint_setup(dpm, i, wp);
break;
@@ -1016,7 +1014,7 @@ static int dpm_remove_watchpoint(struct target *target, struct watchpoint *wp)
struct arm_dpm *dpm = arm->dpm;
int retval = ERROR_COMMAND_SYNTAX_ERROR;
- for (unsigned i = 0; i < dpm->nwp; i++) {
+ for (unsigned int i = 0; i < dpm->nwp; i++) {
if (dpm->dwp[i].wp == wp) {
dpm->dwp[i].wp = NULL;
dpm->dwp[i].bpwp.dirty = true;
@@ -1163,7 +1161,7 @@ int arm_dpm_initialize(struct arm_dpm *dpm)
{
/* Disable all breakpoints and watchpoints at startup. */
if (dpm->bpwp_disable) {
- unsigned i;
+ unsigned int i;
for (i = 0; i < dpm->nbp; i++) {
dpm->dbp[i].bpwp.number = i;
generated by cgit v1.1 at 2025-07-13 22:59:33 +0000