aboutsummaryrefslogtreecommitdiff
path: root/testing/examples/SAM7S256Test
diff options
context:
space:
mode:
authorPalmer Dabbelt <palmer@dabbelt.com>2017-04-06 15:24:17 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2017-04-06 15:24:17 -0700
commitfab7311f18c49be82e8e1681c8966e576525d3ed (patch)
tree4b825dc642cb6eb9a060e54bf8d69288fbee4904 /testing/examples/SAM7S256Test
parentffe0ced9ebd54ab1e297ebdf0f6b995b3e077989 (diff)
downloadriscv-openocd-__archive__.zip
riscv-openocd-__archive__.tar.gz
riscv-openocd-__archive__.tar.bz2
archive branch__archive__
Diffstat (limited to 'testing/examples/SAM7S256Test')
-rw-r--r--testing/examples/SAM7S256Test/inc/typedefs.h50
-rw-r--r--testing/examples/SAM7S256Test/makefile146
-rw-r--r--testing/examples/SAM7S256Test/prj/eclipse_ram.gdb32
-rw-r--r--testing/examples/SAM7S256Test/prj/eclipse_rom.gdb32
-rw-r--r--testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg39
-rw-r--r--testing/examples/SAM7S256Test/prj/sam7s256_ram.ld132
-rw-r--r--testing/examples/SAM7S256Test/prj/sam7s256_reset.script17
-rw-r--r--testing/examples/SAM7S256Test/prj/sam7s256_rom.ld133
-rw-r--r--testing/examples/SAM7S256Test/results/607.html698
-rw-r--r--testing/examples/SAM7S256Test/src/crt.s225
-rw-r--r--testing/examples/SAM7S256Test/src/main.c91
-rw-r--r--testing/examples/SAM7S256Test/test_ram.elfbin36888 -> 0 bytes
-rw-r--r--testing/examples/SAM7S256Test/test_ram.hex29
-rw-r--r--testing/examples/SAM7S256Test/test_ram.map170
-rw-r--r--testing/examples/SAM7S256Test/test_rom.elfbin36888 -> 0 bytes
-rw-r--r--testing/examples/SAM7S256Test/test_rom.hex29
-rw-r--r--testing/examples/SAM7S256Test/test_rom.map170
17 files changed, 0 insertions, 1993 deletions
diff --git a/testing/examples/SAM7S256Test/inc/typedefs.h b/testing/examples/SAM7S256Test/inc/typedefs.h
deleted file mode 100644
index 4213642..0000000
--- a/testing/examples/SAM7S256Test/inc/typedefs.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-* History:
-*
-* 30.03.06 mifi First Version for Insight tutorial
-****************************************************************************/
-#ifndef __TYPEDEFS_H__
-#define __TYPEDEFS_H__
-
-/*
- * Some types to use Windows like source
- */
-typedef char CHAR; /* 8-bit signed data */
-typedef unsigned char BYTE; /* 8-bit unsigned data */
-typedef unsigned short WORD; /* 16-bit unsigned data */
-typedef long LONG; /* 32-bit signed data */
-typedef unsigned long ULONG; /* 32-bit unsigned data */
-typedef unsigned long DWORD; /* 32-bit unsigned data */
-
-
-#endif /* !__TYPEDEFS_H_ */
-/*** EOF ***/
diff --git a/testing/examples/SAM7S256Test/makefile b/testing/examples/SAM7S256Test/makefile
deleted file mode 100644
index 9e1e83f..0000000
--- a/testing/examples/SAM7S256Test/makefile
+++ /dev/null
@@ -1,146 +0,0 @@
-#
-# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
-#
-##############################################################################################
-#
-# On command line:
-#
-# make all = Create project
-#
-# make clean = Clean project files.
-#
-# To rebuild project do "make clean" and "make all".
-#
-
-##############################################################################################
-# Start of default section
-#
-
-TRGT = arm-elf-
-CC = $(TRGT)gcc
-CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
-BIN = $(CP) -O ihex
-
-MCU = arm7tdmi
-
-# List all default C defines here, like -D_DEBUG=1
-DDEFS =
-
-# List all default ASM defines here, like -D_DEBUG=1
-DADEFS =
-
-# List all default directories to look for include files here
-DINCDIR =
-
-# List the default directory to look for the libraries here
-DLIBDIR =
-
-# List all default libraries here
-DLIBS =
-
-#
-# End of default section
-##############################################################################################
-
-##############################################################################################
-# Start of user section
-#
-
-# Define project name here
-PROJECT = test
-
-# Define linker script file here
-LDSCRIPT_RAM = ./prj/sam7s256_ram.ld
-LDSCRIPT_ROM = ./prj/sam7s256_rom.ld
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS =
-
-# Define ASM defines here
-UADEFS =
-
-# List C source files here
-SRC = ./src/main.c
-
-# List ASM source files here
-ASRC = ./src/crt.s
-
-# List all user directories here
-UINCDIR = ./inc
-
-# List the user directory to look for the libraries here
-ULIBDIR =
-
-# List all user libraries here
-ULIBS =
-
-# Define optimisation level here
-OPT = -O0
-
-#
-# End of user defines
-##############################################################################################
-
-
-INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
-LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
-DEFS = $(DDEFS) $(UDEFS)
-ADEFS = $(DADEFS) $(UADEFS)
-OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
-LIBS = $(DLIBS) $(ULIBS)
-MCFLAGS = -mcpu=$(MCU)
-
-ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
-CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
-LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)
-LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)
-
-# Generate dependency information
-CPFLAGS += -MD -MP -MF .dep/$(@F).d
-
-#
-# makefile rules
-#
-
-all: RAM ROM
-
-RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex
-
-ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex
-
-%o : %c
- $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
-
-%o : %s
- $(AS) -c $(ASFLAGS) $< -o $@
-
-%ram.elf: $(OBJS)
- $(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@
-
-%rom.elf: $(OBJS)
- $(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@
-
-%hex: %elf
- $(BIN) $< $@
-
-clean:
- -rm -f $(OBJS)
- -rm -f $(PROJECT)_ram.elf
- -rm -f $(PROJECT)_ram.map
- -rm -f $(PROJECT)_ram.hex
- -rm -f $(PROJECT)_rom.elf
- -rm -f $(PROJECT)_rom.map
- -rm -f $(PROJECT)_rom.hex
- -rm -f $(SRC:.c=.c.bak)
- -rm -f $(SRC:.c=.lst)
- -rm -f $(ASRC:.s=.s.bak)
- -rm -f $(ASRC:.s=.lst)
- -rm -fR .dep
-
-#
-# Include the dependency files, should be the last of the makefile
-#
--include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
-
-# *** EOF *** \ No newline at end of file
diff --git a/testing/examples/SAM7S256Test/prj/eclipse_ram.gdb b/testing/examples/SAM7S256Test/prj/eclipse_ram.gdb
deleted file mode 100644
index 9d9f24d..0000000
--- a/testing/examples/SAM7S256Test/prj/eclipse_ram.gdb
+++ /dev/null
@@ -1,32 +0,0 @@
-target remote localhost:3333
-monitor reset
-monitor sleep 500
-monitor poll
-monitor soft_reset_halt
-monitor arm7_9 sw_bkpts enable
-
-# WDT_MR, disable watchdog
-monitor mww 0xFFFFFD44 0x00008000
-
-# RSTC_MR, enable user reset
-monitor mww 0xfffffd08 0xa5000001
-
-# CKGR_MOR
-monitor mww 0xFFFFFC20 0x00000601
-monitor sleep 10
-
-# CKGR_PLLR
-monitor mww 0xFFFFFC2C 0x00481c0e
-monitor sleep 10
-
-# PMC_MCKR
-monitor mww 0xFFFFFC30 0x00000007
-monitor sleep 10
-
-# PMC_IER
-monitor mww 0xFFFFFF60 0x00480100
-monitor sleep 100
-
-load
-break main
-continue
diff --git a/testing/examples/SAM7S256Test/prj/eclipse_rom.gdb b/testing/examples/SAM7S256Test/prj/eclipse_rom.gdb
deleted file mode 100644
index db2a464..0000000
--- a/testing/examples/SAM7S256Test/prj/eclipse_rom.gdb
+++ /dev/null
@@ -1,32 +0,0 @@
-target remote localhost:3333
-monitor reset
-monitor sleep 500
-monitor poll
-monitor soft_reset_halt
-monitor arm7_9 force_hw_bkpts enable
-
-# WDT_MR, disable watchdog
-monitor mww 0xFFFFFD44 0x00008000
-
-# RSTC_MR, enable user reset
-monitor mww 0xfffffd08 0xa5000001
-
-# CKGR_MOR
-monitor mww 0xFFFFFC20 0x00000601
-monitor sleep 10
-
-# CKGR_PLLR
-monitor mww 0xFFFFFC2C 0x00481c0e
-monitor sleep 10
-
-# PMC_MCKR
-monitor mww 0xFFFFFC30 0x00000007
-monitor sleep 10
-
-# PMC_IER
-monitor mww 0xFFFFFF60 0x00480100
-monitor sleep 100
-
-load
-break main
-continue
diff --git a/testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg b/testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg
deleted file mode 100644
index 0447ed6..0000000
--- a/testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg
+++ /dev/null
@@ -1,39 +0,0 @@
-#daemon configuration
-telnet_port 4444
-gdb_port 3333
-
-# tell gdb our flash memory map
-# and enable flash programming
-gdb_memory_map enable
-gdb_flash_program enable
-
-#interface
-interface ft2232
-ft2232_device_desc "Amontec JTAGkey A"
-ft2232_layout jtagkey
-ft2232_vid_pid 0x0403 0xcff8
-jtag_speed 0
-jtag_nsrst_delay 200
-jtag_ntrst_delay 200
-
-
-#use combined on interfaces or targets that can't set TRST/SRST separately
-reset_config srst_only srst_pulls_trst
-
-#jtag scan chain
-jtag newtap sam7 cpu -irlen 4 -irmask 0xf
-
-#target configuration
-target create target0 arm7tdmi -endian little -chain-position 0
-[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false
-
-target_script 0 reset .\prj\sam7s256_reset.script
-
-#flash bank <driver> <base> <size> <chip_width> <bus_width>
-flash bank at91sam7 0 0 0 0 0
-
-# For more information about the configuration files,
-# look at the OpenOCD User's Guide.
-
-init
-reset halt
diff --git a/testing/examples/SAM7S256Test/prj/sam7s256_ram.ld b/testing/examples/SAM7S256Test/prj/sam7s256_ram.ld
deleted file mode 100644
index 1b857c9..0000000
--- a/testing/examples/SAM7S256Test/prj/sam7s256_ram.ld
+++ /dev/null
@@ -1,132 +0,0 @@
-/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-*
-* History:
-*
-* 30.03.06 mifi First Version
-****************************************************************************/
-
-
-ENTRY(ResetHandler)
-SEARCH_DIR(.)
-
-/*
- * Define stack size here
- */
-FIQ_STACK_SIZE = 0x0100;
-IRQ_STACK_SIZE = 0x0100;
-ABT_STACK_SIZE = 0x0100;
-UND_STACK_SIZE = 0x0100;
-SVC_STACK_SIZE = 0x0400;
-
-
-MEMORY
-{
- ram : org = 0x00200000, len = 64k
-}
-
-/*
- * Do not change the next code
- */
-SECTIONS
-{
- .text :
- {
- *(.vectors);
- . = ALIGN(4);
- *(.init);
- . = ALIGN(4);
- *(.text);
- . = ALIGN(4);
- *(.rodata);
- . = ALIGN(4);
- *(.rodata*);
- . = ALIGN(4);
- *(.glue_7t);
- . = ALIGN(4);
- *(.glue_7);
- . = ALIGN(4);
- etext = .;
- } > ram
-
- .data :
- {
- PROVIDE (__data_start = .);
- *(.data)
- . = ALIGN(4);
- edata = .;
- _edata = .;
- PROVIDE (__data_end = .);
- } > ram
-
- .bss :
- {
- PROVIDE (__bss_start = .);
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- PROVIDE (__bss_end = .);
-
- . = ALIGN(256);
-
- PROVIDE (__stack_start = .);
-
- PROVIDE (__stack_fiq_start = .);
- . += FIQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_fiq_end = .);
-
- PROVIDE (__stack_irq_start = .);
- . += IRQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_irq_end = .);
-
- PROVIDE (__stack_abt_start = .);
- . += ABT_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_abt_end = .);
-
- PROVIDE (__stack_und_start = .);
- . += UND_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_und_end = .);
-
- PROVIDE (__stack_svc_start = .);
- . += SVC_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_svc_end = .);
- PROVIDE (__stack_end = .);
- PROVIDE (__heap_start = .);
- } > ram
-
-}
-/*** EOF ***/
-
diff --git a/testing/examples/SAM7S256Test/prj/sam7s256_reset.script b/testing/examples/SAM7S256Test/prj/sam7s256_reset.script
deleted file mode 100644
index 456341d..0000000
--- a/testing/examples/SAM7S256Test/prj/sam7s256_reset.script
+++ /dev/null
@@ -1,17 +0,0 @@
-#
-# Init - taken form the script openocd_at91sam7_ecr.script
-#
-# I take this script from the following page:
-#
-# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
-#
-mww 0xfffffd44 0x00008000 # disable watchdog
-mww 0xfffffd08 0xa5000001 # enable user reset
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
-sleep 10
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
-sleep 10
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
-sleep 10
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
-sleep 100
diff --git a/testing/examples/SAM7S256Test/prj/sam7s256_rom.ld b/testing/examples/SAM7S256Test/prj/sam7s256_rom.ld
deleted file mode 100644
index b64854a..0000000
--- a/testing/examples/SAM7S256Test/prj/sam7s256_rom.ld
+++ /dev/null
@@ -1,133 +0,0 @@
-/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-*
-* History:
-*
-* 26.01.08 mifi First Version
-****************************************************************************/
-
-
-ENTRY(ResetHandler)
-SEARCH_DIR(.)
-
-/*
- * Define stack size here
- */
-FIQ_STACK_SIZE = 0x0100;
-IRQ_STACK_SIZE = 0x0100;
-ABT_STACK_SIZE = 0x0100;
-UND_STACK_SIZE = 0x0100;
-SVC_STACK_SIZE = 0x0400;
-
-
-MEMORY
-{
- rom : org = 0x00100000, len = 256k
- ram : org = 0x00200000, len = 64k
-}
-
-/*
- * Do not change the next code
- */
-SECTIONS
-{
- .text :
- {
- *(.vectors);
- . = ALIGN(4);
- *(.init);
- . = ALIGN(4);
- *(.text);
- . = ALIGN(4);
- *(.rodata);
- . = ALIGN(4);
- *(.rodata*);
- . = ALIGN(4);
- *(.glue_7t);
- . = ALIGN(4);
- *(.glue_7);
- . = ALIGN(4);
- etext = .;
- } > rom
-
- .data :
- {
- PROVIDE (__data_start = .);
- *(.data)
- . = ALIGN(4);
- edata = .;
- _edata = .;
- PROVIDE (__data_end = .);
- } > ram
-
- .bss :
- {
- PROVIDE (__bss_start = .);
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- PROVIDE (__bss_end = .);
-
- . = ALIGN(256);
-
- PROVIDE (__stack_start = .);
-
- PROVIDE (__stack_fiq_start = .);
- . += FIQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_fiq_end = .);
-
- PROVIDE (__stack_irq_start = .);
- . += IRQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_irq_end = .);
-
- PROVIDE (__stack_abt_start = .);
- . += ABT_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_abt_end = .);
-
- PROVIDE (__stack_und_start = .);
- . += UND_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_und_end = .);
-
- PROVIDE (__stack_svc_start = .);
- . += SVC_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_svc_end = .);
- PROVIDE (__stack_end = .);
- PROVIDE (__heap_start = .);
- } > ram
-
-}
-/*** EOF ***/
-
diff --git a/testing/examples/SAM7S256Test/results/607.html b/testing/examples/SAM7S256Test/results/607.html
deleted file mode 100644
index 852c0ad..0000000
--- a/testing/examples/SAM7S256Test/results/607.html
+++ /dev/null
@@ -1,698 +0,0 @@
-<html>
-<head>
-<title>Test results for revision 607</title>
-</head>
-
-<body>
-<H1>Test cases</H1>
-<H2>Test case results</H2>
-The test results are stored in seperate documents. One document for
-each subversion number.
-<table border="1">
- <tr><td>Test results</td><td>comment</td></tr>
- <tr><td>607</a></td><td></td></tr>
- <tr><td><a href="results/template.html">template</a></td><td>Test results template</td></tr>
-</table>
-
-<H1>SAM7S64</H1>
-
-<H2>Connectivity</H2>
-<table border=1>
- <tr>
- <td>ID</td>
- <td>Target</td>
- <td>Interface</td>
- <td>Description</td>
- <td>Initial state</td>
- <td>Input</td>
- <td>Expected output</td>
- <td>Actual output</td>
- <td>Pass/Fail</td>
- </tr>
- <tr>
- <td><a name="CON001"/>CON001</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Telnet connection</td>
- <td>Power on, jtag target attached</td>
- <td>On console, type<br><code>telnet ip port</code></td>
- <td><code>Open On-Chip Debugger<br>></code></td>
- <td><code>Open On-Chip Debugger<br>></code></td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="CON002"/>CON002</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>GDB server connection</td>
- <td>Power on, jtag target attached</td>
- <td>On GDB console, type<br><code>target remote ip:port</code></td>
- <td><code>Remote debugging using 10.0.0.73:3333</code></td>
- <td><code>Remote debugging using 10.0.0.73:3333</code></td>
- <td>PASS</td>
- </tr>
-</table>
-
-<H2>Reset</H2>
-<table border=1>
- <tr>
- <td>ID</td>
- <td>Target</td>
- <td>Interface</td>
- <td>Description</td>
- <td>Initial state</td>
- <td>Input</td>
- <td>Expected output</td>
- <td>Actual output</td>
- <td>Pass/Fail</td>
- </tr>
- <tr>
- <td><a name="RES001"/>RES001</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Reset halt on a blank target</td>
- <td>Erase all the content of the flash</td>
- <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
- <td>Reset should return without error and the output should contain<br><code>target state: halted<br>pc = 0</code></td>
- <td>
- <code>
- JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)<br>
- nSRST pulls nTRST, falling back to "reset run_and_halt"<br>
- target state: halted<br>
- target halted in ARM state due to debug request, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x00100178
- </code>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="RES002"/>RES002</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Reset init on a blank target</td>
- <td>Erase all the content of the flash</td>
- <td>Connect via the telnet interface and type <br><code>reset init</code></td>
- <td>Reset should return without error and the output should contain <br><code>executing reset script 'name_of_the_script'</code></td>
- <td>
- <code>
- JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)<br>
- nSRST pulls nTRST, falling back to "reset run_and_init"<br>
- target state: halted<br>
- target halted in ARM state due to debug request, current mode: Supervisor<br>
- cpsr: 0x600000d3 pc: 0x00003e24<br>
- executing reset script 'event/sam7s256_reset.script'
- </code>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="RES003"/>RES003</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Reset after a power cycle of the target</td>
- <td>Reset the target then power cycle the target</td>
- <td>Connect via the telnet interface and type <br><code>reset halt</code> after the power was detected</td>
- <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
- <td>
- <code>
- JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)<br>
- nSRST pulls nTRST, falling back to "reset run_and_halt"<br>
- target state: halted<br>
- target halted in ARM state due to debug request, current mode: Supervisor<br>
- cpsr: 0x300000d3 pc: 0x00003a38
- </code>
- </td>
- <td>PASS</td>
- </tr>
-</table>
-
-<H2>JTAG Speed</H2>
-<table border=1>
- <tr>
- <td>ID</td>
- <td>Target</td>
- <td>ZY1000</td>
- <td>Description</td>
- <td>Initial state</td>
- <td>Input</td>
- <td>Expected output</td>
- <td>Actual output</td>
- <td>Pass/Fail</td>
- </tr>
- <tr>
- <td><a name="SPD001"/>RES001</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>16MHz on normal operation</td>
- <td>Reset init the target according to RES002 </td>
- <td>Exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
- <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
- <td>
- <code>
- > jtag_khz 16000<br>
- > mdw 0 32<br>
- 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
- </code>
- </td>
- <td>PASS</td>
- </tr>
-</table>
-
-<H2>Debugging</H2>
-<table border=1>
- <tr>
- <td>ID</td>
- <td>Target</td>
- <td>Interface</td>
- <td>Description</td>
- <td>Initial state</td>
- <td>Input</td>
- <td>Expected output</td>
- <td>Actual output</td>
- <td>Pass/Fail</td>
- </tr>
- <tr>
- <td><a name="DBG001"/>DBG001</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Load is working</td>
- <td>Reset init is working, RAM is accesible, GDB server is started</td>
- <td>On the console of the OS: <br>
- <code>arm-elf-gdb test_ram.elf</code><br>
- <code>(gdb) target remote ip:port</code><br>
- <code>(gdb) load</load>
- </td>
- <td>Load should return without error, typical output looks like:<br>
- <code>
- Loading section .text, size 0x14c lma 0x0<br>
- Start address 0x40, load size 332<br>
- Transfer rate: 180 bytes/sec, 332 bytes/write.<br>
- </code>
- </td>
- <td><code>
- (gdb) load<br>
- Loading section .text, size 0x194 lma 0x200000<br>
- Start address 0x200040, load size 404<br>
- Transfer rate: 17470 bits/sec, 404 bytes/write.
- </code></td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="DBG002"/>DBG002</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Software breakpoint</td>
- <td>Load the test_ram.elf application, use instructions from GDB001</td>
- <td>In the GDB console:<br>
- <code>
- (gdb) monitor arm7_9 sw_bkpts enable<br>
- software breakpoints enabled<br>
- (gdb) break main<br>
- Breakpoint 1 at 0xec: file src/main.c, line 71.<br>
- (gdb) continue<br>
- Continuing.
- </code>
- </td>
- <td>The software breakpoint should be reached, a typical output looks like:<br>
- <code>
- target state: halted<br>
- target halted in ARM state due to breakpoint, current mode: Supervisor<br>
- cpsr: 0x000000d3 pc: 0x000000ec<br>
- <br>
- Breakpoint 1, main () at src/main.c:71<br>
- 71 DWORD a = 1;
- </code>
- </td>
- <td>
- <code>
- (gdb) break main<br>
- Breakpoint 2 at 0x200134: file src/main.c, line 69.<br>
- (gdb) c<br>
- Continuing.<br>
- target state: halted<br>
- target halted in ARM state due to breakpoint, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x00200134<br>
- <br>
- Breakpoint 2, main () at src/main.c:69<br>
- 69 DWORD a = 1;
- </code>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="DBG003"/>DBG003</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Single step in a RAM application</td>
- <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
- <td>In GDB, type <br><code>(gdb) step</code></td>
- <td>The next instruction should be reached, typical output:<br>
- <code>
- (gdb) step<br>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Abort<br>
- cpsr: 0x20000097 pc: 0x000000f0<br>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Abort<br>
- cpsr: 0x20000097 pc: 0x000000f4<br>
- 72 DWORD b = 2;
- </code>
- </td>
- <td>
- <code>
- (gdb) step<br>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Abort<br>
- cpsr: 0x20000097 pc: 0x000000f0<br>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Abort<br>
- cpsr: 0x20000097 pc: 0x000000f4<br>
- 72 DWORD b = 2;
- </code>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="DBG004"/>DBG004</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Software break points are working after a reset</td>
- <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
- <td>In GDB, type <br><code>
- (gdb) monitor reset<br>
- (gdb) load<br>
- (gdb) continue<br>
- </code></td>
- <td>The breakpoint should be reached, typical output:<br>
- <code>
- target state: halted<br>
- target halted in ARM state due to breakpoint, current mode: Supervisor<br>
- cpsr: 0x000000d3 pc: 0x000000ec<br>
- <br>
- Breakpoint 1, main () at src/main.c:71<br>
- 71 DWORD a = 1;
- </code>
- </td>
- <td><code>
- (gdb) moni reset<br>
- JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)<br>
- target state: halted<br>
- target halted in ARM state due to debug request, current mode: Supervisor<br>
- cpsr: 0x600000d3 pc: 0x00003e28<br>
- executing reset script 'event/sam7s256_reset.script'<br>
- (gdb) load<br>
- Loading section .text, size 0x194 lma 0x200000<br>
- Start address 0x200040, load size 404<br>
- Transfer rate: 20455 bits/sec, 404 bytes/write.<br>
- (gdb) continue<br>
- Continuing.<br>
- target state: halted<br>
- target halted in ARM state due to breakpoint, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x00200134<br>
- <br>
- Breakpoint 2, main () at src/main.c:69<br>
- 69 DWORD a = 1;
- </code></td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="DBG005"/>DBG005</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Hardware breakpoint</td>
- <td>Flash the test_rom.elf application. Make this test after FLA004 has passed</td>
- <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
- <code>
- (gdb) monitor reset<br>
- (gdb) load<br>
- Loading section .text, size 0x194 lma 0x100000<br>
- Start address 0x100040, load size 404<br>
- Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
- (gdb) monitor arm7_9 force_hw_bkpts enable<br>
- force hardware breakpoints enabled<br>
- (gdb) break main<br>
- Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
- (gdb) continue<br>
- </code>
- </td>
- <td>The breakpoint should be reached, typical output:<br>
- <code>
- Continuing.<br>
- <br>
- Breakpoint 1, main () at src/main.c:69<br>
- 69 DWORD a = 1;<br>
- </code>
- </td>
- <td>
- <code>
- (gdb) break main<br>
- Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
- (gdb) c<br>
- Continuing.<br>
- target state: halted<br>
- target halted in ARM state due to breakpoint, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x00100134<br>
- <br>
- Breakpoint 1, main () at src/main.c:69<br>
- 69 DWORD a = 1;
- </code>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="DBG006"/>DBG006</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Hardware breakpoint is set after a reset</td>
- <td>Follow the instructions to flash and insert a hardware breakpoint from DBG005</td>
- <td>In GDB, type <br>
- <code>
- (gdb) monitor reset<br>
- (gdb) monitor reg pc 0x100000<br>
- pc (/32): 0x00100000<br>
- (gdb) continue
- </code><br>
- where the value inserted in PC is the start address of the application
- </td>
- <td>The breakpoint should be reached, typical output:<br>
- <code>
- Continuing.<br>
- <br>
- Breakpoint 1, main () at src/main.c:69<br>
- 69 DWORD a = 1;<br>
- </code>
- </td>
- <td>
- <code>
- Continuing.<br>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x00100040<br>
- target state: halted<br>
- target halted in ARM state due to breakpoint, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x00100134<br>
- <br>
- Breakpoint 1, main () at src/main.c:69<br>
- 69 DWORD a = 1;
- </code><br>
- <b>Aren't there too many "halted" signs?</b>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="DBG007"/>DBG007</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Single step in ROM</td>
- <td>Flash the test_rom.elf application and set a breakpoint in main, use DBG005. Make this test after FLA004 has passed</td>
- <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
- <code>
- (gdb) monitor reset<br>
- (gdb) load<br>
- Loading section .text, size 0x194 lma 0x100000<br>
- Start address 0x100040, load size 404<br>
- Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
- (gdb) monitor arm7_9 force_hw_bkpts enable<br>
- force hardware breakpoints enabled<br>
- (gdb) break main<br>
- Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
- (gdb) continue<br>
- Continuing.<br>
- <br>
- Breakpoint 1, main () at src/main.c:69<br>
- 69 DWORD a = 1;<br>
- (gdb) step
- </code>
- </td>
- <td>The breakpoint should be reached, typical output:<br>
- <code>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x0010013c<br>
- 70 DWORD b = 2;<br>
- </code>
- </td>
- <td><code>
- (gdb) step<br>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x00100138<br>
- target state: halted<br>
- target halted in ARM state due to single step, current mode: Supervisor<br>
- cpsr: 0x60000013 pc: 0x0010013c<br>
- 70 DWORD b = 2;
- </code></td>
- <td>PASS</td>
- </tr>
-</table>
-
-<H2>RAM access</H2>
-Note: these tests are not designed to test/debug the target, but to test functionalities!
-<table border=1>
- <tr>
- <td>ID</td>
- <td>Target</td>
- <td>Interface</td>
- <td>Description</td>
- <td>Initial state</td>
- <td>Input</td>
- <td>Expected output</td>
- <td>Actual output</td>
- <td>Pass/Fail</td>
- </tr>
- <tr>
- <td><a name="RAM001"/>RAM001</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>32 bit Write/read RAM</td>
- <td>Reset init is working</td>
- <td>On the telnet interface<br>
- <code> > mww ram_address 0xdeadbeef 16<br>
- > mdw ram_address 32
- </code>
- </td>
- <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 32bit long containing 0xdeadbeef.<br>
- <code>
- > mww 0x0 0xdeadbeef 16<br>
- > mdw 0x0 32<br>
- 0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x00000040: e1a00000 e59fa51c e59f051c e04aa000 00080017 00009388 00009388 00009388<br>
- 0x00000060: 00009388 0002c2c0 0002c2c0 000094f8 000094f4 00009388 00009388 00009388<br>
- </code>
- </td>
- <td>
- <code>
- > mww 0x00200000 0xdeadbeef 16<br>
- > mdw 0x00200000 32<br>
- 0x00200000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x00200020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x00200040: e59f10b4 e3a00902 e5810004 e59f00ac e59f10ac e5810000 e3e010ff e59f00a4<br>
- 0x00200060: e5810060 e59f10a0 e3e00000 e5810130 e5810124 e321f0db e59fd090 e321f0d7
- </code>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="RAM002"/>RAM002</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>16 bit Write/read RAM</td>
- <td>Reset init is working</td>
- <td>On the telnet interface<br>
- <code> > mwh ram_address 0xbeef 16<br>
- > mdh ram_address 32
- </code>
- </td>
- <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 16bit long containing 0xbeef.<br>
- <code>
- > mwh 0x0 0xbeef 16<br>
- > mdh 0x0 32<br>
- 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
- 0x00000020: 00e0 0000 021c 0000 0240 0000 026c 0000 0288 0000 0000 0000 0388 0000 0350 0000<br>
- >
- </code>
- </td>
- <td><code>
- > mwh 0x00200000 0xbeef 16<br>
- > mdh 0x00200000 32<br>
- 0x00200000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
- 0x00200020: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
- </code></td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="RAM003"/>RAM003</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>8 bit Write/read RAM</td>
- <td>Reset init is working</td>
- <td>On the telnet interface<br>
- <code> > mwb ram_address 0xab 16<br>
- > mdb ram_address 32
- </code>
- </td>
- <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 8bit long containing 0xab.<br>
- <code>
- > mwb ram_address 0xab 16<br>
- > mdb ram_address 32<br>
- 0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>
- >
- </code>
- </td>
- <td><code>
- > mwb 0x00200000 0xab 16<br>
- > mdb 0x00200000 32<br>
- 0x00200000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
- </code></td>
- <td>PASS</td>
- </tr>
-</table>
-
-
-
-<H2>Flash access</H2>
-<table border=1>
- <tr>
- <td>ID</td>
- <td>Target</td>
- <td>Interface</td>
- <td>Description</td>
- <td>Initial state</td>
- <td>Input</td>
- <td>Expected output</td>
- <td>Actual output</td>
- <td>Pass/Fail</td>
- </tr>
- <tr>
- <td><a name="FLA001"/>FLA001</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Flash probe</td>
- <td>Reset init is working</td>
- <td>On the telnet interface:<br>
- <code> > flash probe 0</code>
- </td>
- <td>The command should execute without error. The output should state the name of the flash and the starting address. An example of output:<br>
- <code>flash 'ecosflash' found at 0x01000000</code>
- </td>
- <td>
- <code>
- > flash probe 0<br>
- flash 'at91sam7' found at 0x00100000
- </code>
- </td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="FLA002"/>FLA002</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>flash fillw</td>
- <td>Reset init is working, flash is probed</td>
- <td>On the telnet interface<br>
- <code> > flash fillw 0x1000000 0xdeadbeef 16
- </code>
- </td>
- <td>The commands should execute without error. The output looks like:<br>
- <code>
- wrote 64 bytes to 0x01000000 in 11.610000s (0.091516 kb/s)
- </code><br>
- To verify the contents of the flash:<br>
- <code>
- > mdw 0x1000000 32<br>
- 0x01000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x01000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
- </code>
- </td>
- <td><code>
- > flash fillw 0x100000 0xdeadbeef 16<br>
- wrote 64 bytes to 0x00100000 in 1.110000s (0.957207 kb/s)<br>
- > mdw 0x100000 32<br>
- 0x00100000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x00100020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
- 0x00100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x00100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
- </code></td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="FLA003"/>FLA003</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Flash erase</td>
- <td>Reset init is working, flash is probed</td>
- <td>On the telnet interface<br>
- <code> > flash erase_address 0x1000000 0x2000
- </code>
- </td>
- <td>The commands should execute without error.<br>
- <code>
- erased address 0x01000000 length 8192 in 4.970000s
- </code>
- To check that the flash has been erased, read at different addresses. The result should always be 0xff.
- <code>
- > mdw 0x1000000 32<br>
- 0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
- </code>
- </td>
- <td><code>
- > flash erase_address 0x100000 0x2000<br>
- erased address 0x00100000 length 8192 in 0.510000s<br>
- > mdw 0x100000 32<br>
- 0x00100000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x00100020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x00100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- 0x00100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
- >
- </code></td>
- <td>PASS</td>
- </tr>
- <tr>
- <td><a name="FLA004"/>FLA004</td>
- <td>SAM7S64</td>
- <td>ZY1000</td>
- <td>Loading to flash from GDB</td>
- <td>Reset init is working, flash is probed, connectivity to GDB server is working</td>
- <td>Start GDB using a ROM elf image, eg: arm-elf-gdb test_rom.elf. <br>
- <code>
- (gdb) target remote ip:port<br>
- (gdb) monitor reset<br>
- (gdb) load<br>
- Loading section .text, size 0x194 lma 0x100000<br>
- Start address 0x100040, load size 404<br>
- Transfer rate: 179 bytes/sec, 404 bytes/write.
- (gdb) monitor verify_image path_to_elf_file
- </code>
- </td>
- <td>The output should look like:<br>
- <code>
- verified 404 bytes in 5.060000s
- </code><br>
- The failure message is something like:<br>
- <code>Verify operation failed address 0x00200000. Was 0x00 instead of 0x18</code>
- </td>
- <td>
- <code>
- (gdb) load<br>
- Loading section .text, size 0x194 lma 0x100000<br>
- Start address 0x100040, load size 404<br>
- Transfer rate: 1540 bits/sec, 404 bytes/write.<br>
- (gdb) monitor verify_image /tftp/10.0.0.9/c:\workspace/ecosboard/ecosboard/phi/openocd/rep/testing/examples/SAM7S256Test/test_rom.elf<br>
- verified 404 bytes in 4.860000s
- </code>
- </td>
- <td>PASS</td>
- </tr>
-</table>
-
-</body>
-</html> \ No newline at end of file
diff --git a/testing/examples/SAM7S256Test/src/crt.s b/testing/examples/SAM7S256Test/src/crt.s
deleted file mode 100644
index 16e5865..0000000
--- a/testing/examples/SAM7S256Test/src/crt.s
+++ /dev/null
@@ -1,225 +0,0 @@
-/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-*
-* History:
-*
-* 18.12.06 mifi First Version
-* The hardware initialization is based on the startup file
-* crtat91sam7x256_rom.S from NutOS 4.2.1.
-* Therefore partial copyright by egnite Software GmbH.
-****************************************************************************/
-
-/*
- * Some defines for the program status registers
- */
- ARM_MODE_USER = 0x10 /* Normal User Mode */
- ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
- ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
- ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
- ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
- ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
- ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
- ARM_MODE_MASK = 0x1F
-
- I_BIT = 0x80 /* disable IRQ when I bit is set */
- F_BIT = 0x40 /* disable IRQ when I bit is set */
-
-/*
- * Register Base Address
- */
- AIC_BASE = 0xFFFFF000
- AIC_EOICR_OFF = 0x130
- AIC_IDCR_OFF = 0x124
-
- RSTC_MR = 0xFFFFFD08
- RSTC_KEY = 0xA5000000
- RSTC_URSTEN = 0x00000001
-
- WDT_BASE = 0xFFFFFD40
- WDT_MR_OFF = 0x00000004
- WDT_WDDIS = 0x00008000
-
- MC_BASE = 0xFFFFFF00
- MC_FMR_OFF = 0x00000060
- MC_FWS_1FWS = 0x00480100
-
- .section .vectors,"ax"
- .code 32
-
-/****************************************************************************/
-/* Vector table and reset entry */
-/****************************************************************************/
-_vectors:
- ldr pc, ResetAddr /* Reset */
- ldr pc, UndefAddr /* Undefined instruction */
- ldr pc, SWIAddr /* Software interrupt */
- ldr pc, PAbortAddr /* Prefetch abort */
- ldr pc, DAbortAddr /* Data abort */
- ldr pc, ReservedAddr /* Reserved */
- ldr pc, IRQAddr /* IRQ interrupt */
- ldr pc, FIQAddr /* FIQ interrupt */
-
-
-ResetAddr: .word ResetHandler
-UndefAddr: .word UndefHandler
-SWIAddr: .word SWIHandler
-PAbortAddr: .word PAbortHandler
-DAbortAddr: .word DAbortHandler
-ReservedAddr: .word 0
-IRQAddr: .word IRQHandler
-FIQAddr: .word FIQHandler
-
- .ltorg
-
- .section .init, "ax"
- .code 32
-
- .global ResetHandler
- .global ExitFunction
- .extern main
-/****************************************************************************/
-/* Reset handler */
-/****************************************************************************/
-ResetHandler:
- /*
- * The watchdog is enabled after processor reset. Disable it.
- */
- ldr r1, =WDT_BASE
- ldr r0, =WDT_WDDIS
- str r0, [r1, #WDT_MR_OFF]
-
-
- /*
- * Enable user reset: assertion length programmed to 1ms
- */
- ldr r0, =(RSTC_KEY | RSTC_URSTEN | (4 << 8))
- ldr r1, =RSTC_MR
- str r0, [r1, #0]
-
-
- /*
- * Use 2 cycles for flash access.
- */
- ldr r1, =MC_BASE
- ldr r0, =MC_FWS_1FWS
- str r0, [r1, #MC_FMR_OFF]
-
-
- /*
- * Disable all interrupts. Useful for debugging w/o target reset.
- */
- ldr r1, =AIC_BASE
- mvn r0, #0
- str r0, [r1, #AIC_EOICR_OFF]
- str r0, [r1, #AIC_IDCR_OFF]
-
-
- /*
- * Setup a stack for each mode
- */
- msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
- ldr sp, =__stack_und_end
-
- msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
- ldr sp, =__stack_abt_end
-
- msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
- ldr sp, =__stack_fiq_end
-
- msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
- ldr sp, =__stack_irq_end
-
- msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
- ldr sp, =__stack_svc_end
-
-
- /*
- * Clear .bss section
- */
- ldr r1, =__bss_start
- ldr r2, =__bss_end
- ldr r3, =0
-bss_clear_loop:
- cmp r1, r2
- strne r3, [r1], #+4
- bne bss_clear_loop
-
-
- /*
- * Jump to main
- */
- mrs r0, cpsr
- bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
- msr cpsr, r0
-
- mov r0, #0 /* No arguments */
- mov r1, #0 /* No arguments */
- ldr r2, =main
- mov lr, pc
- bx r2 /* And jump... */
-
-ExitFunction:
- nop
- nop
- nop
- b ExitFunction
-
-
-/****************************************************************************/
-/* Default interrupt handler */
-/****************************************************************************/
-
-UndefHandler:
- b UndefHandler
-
-SWIHandler:
- b SWIHandler
-
-PAbortHandler:
- b PAbortHandler
-
-DAbortHandler:
- b DAbortHandler
-
-IRQHandler:
- b IRQHandler
-
-FIQHandler:
- b FIQHandler
-
- .weak ExitFunction
- .weak UndefHandler, PAbortHandler, DAbortHandler
- .weak IRQHandler, FIQHandler
-
- .ltorg
-/*** EOF ***/
-
-
diff --git a/testing/examples/SAM7S256Test/src/main.c b/testing/examples/SAM7S256Test/src/main.c
deleted file mode 100644
index 99f2d26..0000000
--- a/testing/examples/SAM7S256Test/src/main.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-* History:
-*
-* 30.03.06 mifi First Version for Insight tutorial
-* 26.01.08 mifi Added variable "d" to test const variable.
-****************************************************************************/
-#define __MAIN_C__
-
-/*
- * I use the include only, to show
- * how to setup a include dir in the makefile
- */
-#include "typedefs.h"
-
-/*=========================================================================*/
-/* DEFINE: All Structures and Common Constants */
-/*=========================================================================*/
-
-/*=========================================================================*/
-/* DEFINE: Prototypes */
-/*=========================================================================*/
-
-/*=========================================================================*/
-/* DEFINE: Definition of all local Data */
-/*=========================================================================*/
-static const DWORD d = 7;
-
-/*=========================================================================*/
-/* DEFINE: Definition of all local Procedures */
-/*=========================================================================*/
-
-/*=========================================================================*/
-/* DEFINE: All code exported */
-/*=========================================================================*/
-/***************************************************************************/
-/* main */
-/***************************************************************************/
-int main (void)
-{
- DWORD a = 1;
- DWORD b = 2;
- DWORD c = 0;
-
- a = a + d;
-
- while (1)
- {
- a++;
- b++;
- c = a + b;
- }
-
- /*
- * This return here make no sense.
- * But to prevent the compiler warning:
- * "return type of 'main' is not 'int'
- * we use an int as return :-)
- */
- return(0);
-}
-
-/*** EOF ***/
diff --git a/testing/examples/SAM7S256Test/test_ram.elf b/testing/examples/SAM7S256Test/test_ram.elf
deleted file mode 100644
index 5143e85..0000000
--- a/testing/examples/SAM7S256Test/test_ram.elf
+++ /dev/null
Binary files differ
diff --git a/testing/examples/SAM7S256Test/test_ram.hex b/testing/examples/SAM7S256Test/test_ram.hex
deleted file mode 100644
index 7194eec..0000000
--- a/testing/examples/SAM7S256Test/test_ram.hex
+++ /dev/null
@@ -1,29 +0,0 @@
-:020000040020DA
-:1000000018F09FE518F09FE518F09FE518F09FE5C0
-:1000100018F09FE518F09FE518F09FE518F09FE5B0
-:1000200040002000E4002000E8002000EC00200058
-:10003000F000200000000000F4002000F800200084
-:10004000B4109FE50209A0E3040081E5AC009FE540
-:10005000AC109FE5000081E5FF10E0E3A4009FE500
-:10006000600081E5A0109FE50000E0E3300181E53C
-:10007000240181E5DBF021E390D09FE5D7F021E377
-:100080008CD09FE5D1F021E388D09FE5D2F021E329
-:1000900084D09FE5D3F021E380D09FE580109FE5D9
-:1000A00080209FE50030A0E3020051E1043081147C
-:1000B000FCFFFF1A00000FE1C000C0E300F029E1DF
-:1000C0000000A0E30010A0E35C209FE50FE0A0E1AA
-:1000D00012FF2FE10000A0E10000A0E10000A0E17C
-:1000E000FBFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA7B
-:1000F000FEFFFFEAFEFFFFEAFEFFFFEA40FDFFFF13
-:10010000010400A508FDFFFF0001480000F0FFFF0B
-:10011000000620000005200000032000000420004D
-:10012000000A2000940120009401200030012000EA
-:100130000CD04DE20130A0E300308DE50230A0E3A9
-:1001400004308DE50030A0E308308DE538309FE5C0
-:10015000002093E500309DE5023083E000308DE51E
-:1001600000309DE5013083E200308DE504309DE5EF
-:10017000013083E204308DE500209DE504309DE5EB
-:10018000033082E008308DE5F4FFFFEA90012000A3
-:040190000700000064
-:040000050020004097
-:00000001FF
diff --git a/testing/examples/SAM7S256Test/test_ram.map b/testing/examples/SAM7S256Test/test_ram.map
deleted file mode 100644
index a773a1f..0000000
--- a/testing/examples/SAM7S256Test/test_ram.map
+++ /dev/null
@@ -1,170 +0,0 @@
-
-Memory Configuration
-
-Name Origin Length Attributes
-ram 0x00200000 0x00010000
-*default* 0x00000000 0xffffffff
-
-Linker script and memory map
-
-LOAD ./src/crt.o
-LOAD ./src/main.o
-START GROUP
-LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2\libgcc.a
-LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2/../../../../arm-elf/lib\libc.a
-END GROUP
- 0x00000100 FIQ_STACK_SIZE = 0x100
- 0x00000100 IRQ_STACK_SIZE = 0x100
- 0x00000100 ABT_STACK_SIZE = 0x100
- 0x00000100 UND_STACK_SIZE = 0x100
- 0x00000400 SVC_STACK_SIZE = 0x400
-
-.text 0x00200000 0x194
- *(.vectors)
- .vectors 0x00200000 0x40 ./src/crt.o
- 0x00200040 . = ALIGN (0x4)
- *(.init)
- .init 0x00200040 0xf0 ./src/crt.o
- 0x002000f8 FIQHandler
- 0x002000ec PAbortHandler
- 0x002000d4 ExitFunction
- 0x00200040 ResetHandler
- 0x002000f0 DAbortHandler
- 0x002000f4 IRQHandler
- 0x002000e4 UndefHandler
- 0x00200130 . = ALIGN (0x4)
- *(.text)
- .text 0x00200130 0x0 ./src/crt.o
- .text 0x00200130 0x60 ./src/main.o
- 0x00200130 main
- 0x00200190 . = ALIGN (0x4)
- *(.rodata)
- .rodata 0x00200190 0x4 ./src/main.o
- 0x00200194 . = ALIGN (0x4)
- *(.rodata*)
- 0x00200194 . = ALIGN (0x4)
- *(.glue_7t)
- .glue_7t 0x00200194 0x0 ./src/crt.o
- .glue_7t 0x00200194 0x0 ./src/main.o
- 0x00200194 . = ALIGN (0x4)
- *(.glue_7)
- .glue_7 0x00200194 0x0 ./src/crt.o
- .glue_7 0x00200194 0x0 ./src/main.o
- 0x00200194 . = ALIGN (0x4)
- 0x00200194 etext = .
-
-.vfp11_veneer 0x00000000 0x0
- .vfp11_veneer 0x00000000 0x0 ./src/crt.o
- .vfp11_veneer 0x00000000 0x0 ./src/main.o
-
-.data 0x00200194 0x0
- 0x00200194 PROVIDE (__data_start, .)
- *(.data)
- .data 0x00200194 0x0 ./src/crt.o
- .data 0x00200194 0x0 ./src/main.o
- 0x00200194 . = ALIGN (0x4)
- 0x00200194 edata = .
- 0x00200194 _edata = .
- 0x00200194 PROVIDE (__data_end, .)
-
-.bss 0x00200194 0x86c
- 0x00200194 PROVIDE (__bss_start, .)
- *(.bss)
- .bss 0x00200194 0x0 ./src/crt.o
- .bss 0x00200194 0x0 ./src/main.o
- *(COMMON)
- 0x00200194 . = ALIGN (0x4)
- 0x00200194 PROVIDE (__bss_end, .)
- 0x00200200 . = ALIGN (0x100)
- *fill* 0x00200194 0x6c 00
- 0x00200200 PROVIDE (__stack_start, .)
- 0x00200200 PROVIDE (__stack_fiq_start, .)
- 0x00200300 . = (. + FIQ_STACK_SIZE)
- *fill* 0x00200200 0x100 00
- 0x00200300 . = ALIGN (0x4)
- 0x00200300 PROVIDE (__stack_fiq_end, .)
- 0x00200300 PROVIDE (__stack_irq_start, .)
- 0x00200400 . = (. + IRQ_STACK_SIZE)
- *fill* 0x00200300 0x100 00
- 0x00200400 . = ALIGN (0x4)
- 0x00200400 PROVIDE (__stack_irq_end, .)
- 0x00200400 PROVIDE (__stack_abt_start, .)
- 0x00200500 . = (. + ABT_STACK_SIZE)
- *fill* 0x00200400 0x100 00
- 0x00200500 . = ALIGN (0x4)
- 0x00200500 PROVIDE (__stack_abt_end, .)
- 0x00200500 PROVIDE (__stack_und_start, .)
- 0x00200600 . = (. + UND_STACK_SIZE)
- *fill* 0x00200500 0x100 00
- 0x00200600 . = ALIGN (0x4)
- 0x00200600 PROVIDE (__stack_und_end, .)
- 0x00200600 PROVIDE (__stack_svc_start, .)
- 0x00200a00 . = (. + SVC_STACK_SIZE)
- *fill* 0x00200600 0x400 00
- 0x00200a00 . = ALIGN (0x4)
- 0x00200a00 PROVIDE (__stack_svc_end, .)
- 0x00200a00 PROVIDE (__stack_end, .)
- 0x00200a00 PROVIDE (__heap_start, .)
-OUTPUT(test_ram.elf elf32-littlearm)
-
-.ARM.attributes
- 0x00000000 0x10
- .ARM.attributes
- 0x00000000 0x10 ./src/crt.o
- .ARM.attributes
- 0x00000010 0x10 ./src/main.o
-
-.debug_line 0x00000000 0xd6
- .debug_line 0x00000000 0x7f ./src/crt.o
- .debug_line 0x0000007f 0x57 ./src/main.o
-
-.debug_info 0x00000000 0x1aa
- .debug_info 0x00000000 0x75 ./src/crt.o
- .debug_info 0x00000075 0x135 ./src/main.o
-
-.debug_abbrev 0x00000000 0x6d
- .debug_abbrev 0x00000000 0x12 ./src/crt.o
- .debug_abbrev 0x00000012 0x5b ./src/main.o
-
-.debug_aranges 0x00000000 0x48
- .debug_aranges
- 0x00000000 0x28 ./src/crt.o
- .debug_aranges
- 0x00000028 0x20 ./src/main.o
-
-.debug_ranges 0x00000000 0x20
- .debug_ranges 0x00000000 0x20 ./src/crt.o
-
-.debug_frame 0x00000000 0x24
- .debug_frame 0x00000000 0x24 ./src/main.o
-
-.debug_loc 0x00000000 0x1f
- .debug_loc 0x00000000 0x1f ./src/main.o
-
-.debug_pubnames
- 0x00000000 0x1b
- .debug_pubnames
- 0x00000000 0x1b ./src/main.o
-
-.comment 0x00000000 0x12
- .comment 0x00000000 0x12 ./src/main.o
-
-Cross Reference Table
-
-Symbol File
-DAbortHandler ./src/crt.o
-ExitFunction ./src/crt.o
-FIQHandler ./src/crt.o
-IRQHandler ./src/crt.o
-PAbortHandler ./src/crt.o
-ResetHandler ./src/crt.o
-UndefHandler ./src/crt.o
-__bss_end ./src/crt.o
-__bss_start ./src/crt.o
-__stack_abt_end ./src/crt.o
-__stack_fiq_end ./src/crt.o
-__stack_irq_end ./src/crt.o
-__stack_svc_end ./src/crt.o
-__stack_und_end ./src/crt.o
-main ./src/main.o
- ./src/crt.o
diff --git a/testing/examples/SAM7S256Test/test_rom.elf b/testing/examples/SAM7S256Test/test_rom.elf
deleted file mode 100644
index e1ba239..0000000
--- a/testing/examples/SAM7S256Test/test_rom.elf
+++ /dev/null
Binary files differ
diff --git a/testing/examples/SAM7S256Test/test_rom.hex b/testing/examples/SAM7S256Test/test_rom.hex
deleted file mode 100644
index 27c4cba..0000000
--- a/testing/examples/SAM7S256Test/test_rom.hex
+++ /dev/null
@@ -1,29 +0,0 @@
-:020000040010EA
-:1000000018F09FE518F09FE518F09FE518F09FE5C0
-:1000100018F09FE518F09FE518F09FE518F09FE5B0
-:1000200040001000E4001000E8001000EC00100098
-:10003000F000100000000000F4001000F8001000B4
-:10004000B4109FE50209A0E3040081E5AC009FE540
-:10005000AC109FE5000081E5FF10E0E3A4009FE500
-:10006000600081E5A0109FE50000E0E3300181E53C
-:10007000240181E5DBF021E390D09FE5D7F021E377
-:100080008CD09FE5D1F021E388D09FE5D2F021E329
-:1000900084D09FE5D3F021E380D09FE580109FE5D9
-:1000A00080209FE50030A0E3020051E1043081147C
-:1000B000FCFFFF1A00000FE1C000C0E300F029E1DF
-:1000C0000000A0E30010A0E35C209FE50FE0A0E1AA
-:1000D00012FF2FE10000A0E10000A0E10000A0E17C
-:1000E000FBFFFFEAFEFFFFEAFEFFFFEAFEFFFFEA7B
-:1000F000FEFFFFEAFEFFFFEAFEFFFFEA40FDFFFF13
-:10010000010400A508FDFFFF0001480000F0FFFF0B
-:100110000004200000032000000120000002200055
-:100120000008200000002000000020003001100026
-:100130000CD04DE20130A0E300308DE50230A0E3A9
-:1001400004308DE50030A0E308308DE538309FE5C0
-:10015000002093E500309DE5023083E000308DE51E
-:1001600000309DE5013083E200308DE504309DE5EF
-:10017000013083E204308DE500209DE504309DE5EB
-:10018000033082E008308DE5F4FFFFEA90011000B3
-:040190000700000064
-:0400000500100040A7
-:00000001FF
diff --git a/testing/examples/SAM7S256Test/test_rom.map b/testing/examples/SAM7S256Test/test_rom.map
deleted file mode 100644
index c8047f2..0000000
--- a/testing/examples/SAM7S256Test/test_rom.map
+++ /dev/null
@@ -1,170 +0,0 @@
-
-Memory Configuration
-
-Name Origin Length Attributes
-rom 0x00100000 0x00040000
-ram 0x00200000 0x00010000
-*default* 0x00000000 0xffffffff
-
-Linker script and memory map
-
-LOAD ./src/crt.o
-LOAD ./src/main.o
-START GROUP
-LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2\libgcc.a
-LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2/../../../../arm-elf/lib\libc.a
-END GROUP
- 0x00000100 FIQ_STACK_SIZE = 0x100
- 0x00000100 IRQ_STACK_SIZE = 0x100
- 0x00000100 ABT_STACK_SIZE = 0x100
- 0x00000100 UND_STACK_SIZE = 0x100
- 0x00000400 SVC_STACK_SIZE = 0x400
-
-.text 0x00100000 0x194
- *(.vectors)
- .vectors 0x00100000 0x40 ./src/crt.o
- 0x00100040 . = ALIGN (0x4)
- *(.init)
- .init 0x00100040 0xf0 ./src/crt.o
- 0x001000f8 FIQHandler
- 0x001000ec PAbortHandler
- 0x001000d4 ExitFunction
- 0x00100040 ResetHandler
- 0x001000f0 DAbortHandler
- 0x001000f4 IRQHandler
- 0x001000e4 UndefHandler
- 0x00100130 . = ALIGN (0x4)
- *(.text)
- .text 0x00100130 0x0 ./src/crt.o
- .text 0x00100130 0x60 ./src/main.o
- 0x00100130 main
- 0x00100190 . = ALIGN (0x4)
- *(.rodata)
- .rodata 0x00100190 0x4 ./src/main.o
- 0x00100194 . = ALIGN (0x4)
- *(.rodata*)
- 0x00100194 . = ALIGN (0x4)
- *(.glue_7t)
- .glue_7t 0x00100194 0x0 ./src/crt.o
- .glue_7t 0x00100194 0x0 ./src/main.o
- 0x00100194 . = ALIGN (0x4)
- *(.glue_7)
- .glue_7 0x00100194 0x0 ./src/crt.o
- .glue_7 0x00100194 0x0 ./src/main.o
- 0x00100194 . = ALIGN (0x4)
- 0x00100194 etext = .
-
-.vfp11_veneer 0x00000000 0x0
- .vfp11_veneer 0x00000000 0x0 ./src/crt.o
- .vfp11_veneer 0x00000000 0x0 ./src/main.o
-
-.data 0x00200000 0x0
- 0x00200000 PROVIDE (__data_start, .)
- *(.data)
- .data 0x00200000 0x0 ./src/crt.o
- .data 0x00200000 0x0 ./src/main.o
- 0x00200000 . = ALIGN (0x4)
- 0x00200000 edata = .
- 0x00200000 _edata = .
- 0x00200000 PROVIDE (__data_end, .)
-
-.bss 0x00200000 0x800
- 0x00200000 PROVIDE (__bss_start, .)
- *(.bss)
- .bss 0x00200000 0x0 ./src/crt.o
- .bss 0x00200000 0x0 ./src/main.o
- *(COMMON)
- 0x00200000 . = ALIGN (0x4)
- 0x00200000 PROVIDE (__bss_end, .)
- 0x00200000 . = ALIGN (0x100)
- 0x00200000 PROVIDE (__stack_start, .)
- 0x00200000 PROVIDE (__stack_fiq_start, .)
- 0x00200100 . = (. + FIQ_STACK_SIZE)
- *fill* 0x00200000 0x100 00
- 0x00200100 . = ALIGN (0x4)
- 0x00200100 PROVIDE (__stack_fiq_end, .)
- 0x00200100 PROVIDE (__stack_irq_start, .)
- 0x00200200 . = (. + IRQ_STACK_SIZE)
- *fill* 0x00200100 0x100 00
- 0x00200200 . = ALIGN (0x4)
- 0x00200200 PROVIDE (__stack_irq_end, .)
- 0x00200200 PROVIDE (__stack_abt_start, .)
- 0x00200300 . = (. + ABT_STACK_SIZE)
- *fill* 0x00200200 0x100 00
- 0x00200300 . = ALIGN (0x4)
- 0x00200300 PROVIDE (__stack_abt_end, .)
- 0x00200300 PROVIDE (__stack_und_start, .)
- 0x00200400 . = (. + UND_STACK_SIZE)
- *fill* 0x00200300 0x100 00
- 0x00200400 . = ALIGN (0x4)
- 0x00200400 PROVIDE (__stack_und_end, .)
- 0x00200400 PROVIDE (__stack_svc_start, .)
- 0x00200800 . = (. + SVC_STACK_SIZE)
- *fill* 0x00200400 0x400 00
- 0x00200800 . = ALIGN (0x4)
- 0x00200800 PROVIDE (__stack_svc_end, .)
- 0x00200800 PROVIDE (__stack_end, .)
- 0x00200800 PROVIDE (__heap_start, .)
-OUTPUT(test_rom.elf elf32-littlearm)
-
-.ARM.attributes
- 0x00000000 0x10
- .ARM.attributes
- 0x00000000 0x10 ./src/crt.o
- .ARM.attributes
- 0x00000010 0x10 ./src/main.o
-
-.debug_line 0x00000000 0xd6
- .debug_line 0x00000000 0x7f ./src/crt.o
- .debug_line 0x0000007f 0x57 ./src/main.o
-
-.debug_info 0x00000000 0x1aa
- .debug_info 0x00000000 0x75 ./src/crt.o
- .debug_info 0x00000075 0x135 ./src/main.o
-
-.debug_abbrev 0x00000000 0x6d
- .debug_abbrev 0x00000000 0x12 ./src/crt.o
- .debug_abbrev 0x00000012 0x5b ./src/main.o
-
-.debug_aranges 0x00000000 0x48
- .debug_aranges
- 0x00000000 0x28 ./src/crt.o
- .debug_aranges
- 0x00000028 0x20 ./src/main.o
-
-.debug_ranges 0x00000000 0x20
- .debug_ranges 0x00000000 0x20 ./src/crt.o
-
-.debug_frame 0x00000000 0x24
- .debug_frame 0x00000000 0x24 ./src/main.o
-
-.debug_loc 0x00000000 0x1f
- .debug_loc 0x00000000 0x1f ./src/main.o
-
-.debug_pubnames
- 0x00000000 0x1b
- .debug_pubnames
- 0x00000000 0x1b ./src/main.o
-
-.comment 0x00000000 0x12
- .comment 0x00000000 0x12 ./src/main.o
-
-Cross Reference Table
-
-Symbol File
-DAbortHandler ./src/crt.o
-ExitFunction ./src/crt.o
-FIQHandler ./src/crt.o
-IRQHandler ./src/crt.o
-PAbortHandler ./src/crt.o
-ResetHandler ./src/crt.o
-UndefHandler ./src/crt.o
-__bss_end ./src/crt.o
-__bss_start ./src/crt.o
-__stack_abt_end ./src/crt.o
-__stack_fiq_end ./src/crt.o
-__stack_irq_end ./src/crt.o
-__stack_svc_end ./src/crt.o
-__stack_und_end ./src/crt.o
-main ./src/main.o
- ./src/crt.o
generated by cgit v1.1 at 2026-02-04 12:54:40 +0000