diff options
| author | Daniel Anselmi <danselmi@gmx.ch> | 2022-12-12 09:49:51 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2023-04-30 14:54:18 +0000 |
| commit | 7c6d44644082eb33d91af62091c37ba1384555ad (patch) | |
| tree | b2502f979bc92b781eec0006521f98e1f842764c /tcl | |
| parent | e33eae340d3502ffab8c172c246bc392a093c2ea (diff) | |
| download | riscv-openocd-7c6d44644082eb33d91af62091c37ba1384555ad.zip riscv-openocd-7c6d44644082eb33d91af62091c37ba1384555ad.tar.gz riscv-openocd-7c6d44644082eb33d91af62091c37ba1384555ad.tar.bz2 | |
pld: add support for efinix devices
Change-Id: Ie520e761c255ba1335d5aab9c6825f160a6151d9
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7288
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/board/trion_t20_bga256.cfg | 24 | ||||
| -rw-r--r-- | tcl/fpga/efinix_titanium.cfg | 23 | ||||
| -rw-r--r-- | tcl/fpga/efinix_trion.cfg | 17 |
3 files changed, 64 insertions, 0 deletions
diff --git a/tcl/board/trion_t20_bga256.cfg b/tcl/board/trion_t20_bga256.cfg new file mode 100644 index 0000000..045d63d --- /dev/null +++ b/tcl/board/trion_t20_bga256.cfg @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Trion® T20 BGA256 Development Kit +# https://www.efinixinc.com/docs/trion20-devkit-ug-v1.5.pdf +# +# works after power cycle or pushing sw1. +# it is because we cannot control CDONE which is connected to ftdi channel 0 +# note from an006: For JTAG programming, T4, T8, T13, and T20 FPGAs use the +# CRESET_N and SS_N pins in addition to the standard JTAG pins. + +adapter driver ftdi +ftdi vid_pid 0x0403 0x6010 + +ftdi channel 1 +ftdi layout_init 0x0008 0x008b +reset_config none +transport select jtag +adapter speed 6000 + +source [find fpga/efinix_trion.cfg] + +#openocd -f board/trion_t20_bga256.cfg -c "init" -c "pld load 0 outflow/trion_blinker.bit" +#ipdbg -start -tap trion.tap -hub 0x8 -port 5555 -tool 0 + diff --git a/tcl/fpga/efinix_titanium.cfg b/tcl/fpga/efinix_titanium.cfg new file mode 100644 index 0000000..681b58f --- /dev/null +++ b/tcl/fpga/efinix_titanium.cfg @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# efinix titanium +# https://www.efinixinc.com/docs/an048-jtag-bst-titanium-v1.0.pdf + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME titanium +} + +jtag newtap $_CHIPNAME tap -irlen 5 -ignore-version \ + -expected-id 0x10661A79 \ + -expected-id 0x00360A79 \ + -expected-id 0x10660A79 \ + -expected-id 0x00681A79 \ + -expected-id 0x00688A79 \ + -expected-id 0x00682A79 \ + -expected-id 0x0068CA79 \ + -expected-id 0x00680A79 \ + -expected-id 0x00684A79 + +pld device efinix $_CHIPNAME.tap diff --git a/tcl/fpga/efinix_trion.cfg b/tcl/fpga/efinix_trion.cfg new file mode 100644 index 0000000..ecd2eda --- /dev/null +++ b/tcl/fpga/efinix_trion.cfg @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# efinix trion +# https://www.efinixinc.com/docs/an021-jtag-bst-trion-v1.0.pdf + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME trion +} + +jtag newtap $_CHIPNAME tap -irlen 4 -ignore-version \ + -expected-id 0x00210A79 \ + -expected-id 0x00240A79 \ + -expected-id 0x00220A79 + +pld device efinix $_CHIPNAME.tap |