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| author | Andreas Färber <afaerber@suse.de> | 2015-10-20 00:22:50 +0200 |
|---|---|---|
| committer | Freddie Chopin <freddie.chopin@gmail.com> | 2015-10-30 13:14:12 +0000 |
| commit | 2cbbe9abf5dab934bf7abd6f4e0a3f8f9dec81f0 (patch) | |
| tree | fcaba35c945ade95ff945394b693e0295ee06467 /tcl | |
| parent | 4124e5deb4d95be490a6127ae15f28b1403a969e (diff) | |
| download | riscv-openocd-2cbbe9abf5dab934bf7abd6f4e0a3f8f9dec81f0.zip riscv-openocd-2cbbe9abf5dab934bf7abd6f4e0a3f8f9dec81f0.tar.gz riscv-openocd-2cbbe9abf5dab934bf7abd6f4e0a3f8f9dec81f0.tar.bz2 | |
tcl/target: Add LPC4357 config
Reuse the flashless LPC4350 as base and amend it as necessary.
The LPC43x7 have 2x 512 KB of flash.
Change-Id: Ia7ffbc7101023479971984b839f171ed4be6b089
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3037
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/lpc4350.cfg | 9 | ||||
| -rw-r--r-- | tcl/target/lpc4357.cfg | 12 |
2 files changed, 21 insertions, 0 deletions
diff --git a/tcl/target/lpc4350.cfg b/tcl/target/lpc4350.cfg index fae54f7..4e23ffb 100644 --- a/tcl/target/lpc4350.cfg +++ b/tcl/target/lpc4350.cfg @@ -51,6 +51,15 @@ if { [using_jtag] } { target create $_CHIPNAME.m0 cortex_m -chain-position $_CHIPNAME.m0 } +# LPC4350 has 96+32 KB SRAM +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x20000 +} +$_CHIPNAME.m4 configure -work-area-phys 0x10000000 \ + -work-area-size $_WORKAREASIZE -work-area-backup 0 + if {![using_hla]} { # on this CPU we should use VECTRESET to perform a soft reset and # manually reset the periphery diff --git a/tcl/target/lpc4357.cfg b/tcl/target/lpc4357.cfg new file mode 100644 index 0000000..1a15ad6 --- /dev/null +++ b/tcl/target/lpc4357.cfg @@ -0,0 +1,12 @@ +# +# NXP LPC4357 +# + +if { ![info exists CHIPNAME] } { + set CHIPNAME lpc4357 +} +set WORKAREASIZE 0x8000 +source [find target/lpc4350.cfg] + +flash bank $_CHIPNAME.flasha lpc2000 0x1A000000 0x80000 0 0 $_CHIPNAME.m4 lpc4300 204000 calc_checksum +flash bank $_CHIPNAME.flashb lpc2000 0x1B000000 0x80000 0 0 $_CHIPNAME.m4 lpc4300 204000 calc_checksum |