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| author | Ed Beroset <beroset@ieee.org> | 2015-01-17 17:04:10 -0500 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2015-02-11 15:11:19 +0000 |
| commit | 18d6c0b02bf5e1318d5f5484b5ba68b476a418f0 (patch) | |
| tree | 73f064abb571b02436d1a032143fe9f6156150f0 /tcl | |
| parent | d66f48d1f6923e46b81b790d6e02396b4f0f519f (diff) | |
| download | riscv-openocd-18d6c0b02bf5e1318d5f5484b5ba68b476a418f0.zip riscv-openocd-18d6c0b02bf5e1318d5f5484b5ba68b476a418f0.tar.gz riscv-openocd-18d6c0b02bf5e1318d5f5484b5ba68b476a418f0.tar.bz2 | |
em357: added target files for em357 and em358
This patch adds support for Silicon Labs (formerly Ember) EM357
and EM358 chips and derivatives.
Change-Id: Ie63aed95a2f4ef1a6b955e301a51b4de1b3a5462
Signed-off-by: Ed Beroset <beroset@ieee.org>
Reviewed-on: http://openocd.zylin.com/2470
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/em357.cfg | 67 | ||||
| -rw-r--r-- | tcl/target/em358.cfg | 14 |
2 files changed, 81 insertions, 0 deletions
diff --git a/tcl/target/em357.cfg b/tcl/target/em357.cfg new file mode 100644 index 0000000..f44b298 --- /dev/null +++ b/tcl/target/em357.cfg @@ -0,0 +1,67 @@ +# +# Target configuration for the Silicon Labs EM357 chips +# + +# +# em357 family supports JTAG and SWD transports +# +source [find target/swj-dp.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME em357 +} + +# Work-area is a space in RAM used for flash programming +# By default use 4kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x1000 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + if { [using_jtag] } { + set _CPUTAPID 0x3ba00477 + } else { + set _CPUTAPID 0x1ba00477 + } +} + +if { [info exists BSTAPID] } { + set _BSTAPID $BSTAPID +} else { + set _BSTAPID 0x069aa62b +} + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME em358 +} + +if { [info exists FLASHSIZE] } { + set _FLASHSIZE $FLASHSIZE +} else { + set _FLASHSIZE 0x30000 +} + +swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID +if { [using_jtag] } { + swj_newdap $_CHIPNAME bs -irlen 4 -expected-id $_BSTAPID -ircapture 0xe -irmask 0xf +} + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian little -chain-position $_TARGETNAME + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME + +if { ![using_hla]} { + cortex_m reset_config sysresetreq +} diff --git a/tcl/target/em358.cfg b/tcl/target/em358.cfg new file mode 100644 index 0000000..c2d48bf --- /dev/null +++ b/tcl/target/em358.cfg @@ -0,0 +1,14 @@ +# +# Target configuration for the Silicon Labs EM358 chips + +# +# em357 family supports JTAG and SWD transports +# + +if { ![info exists CHIPNAME] } { + set CHIPNAME em358 +} + +# 512K of flash in the em358 chips +set FLASHSIZE 0x80000 +source [find target/em357.cfg] |