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authorTim Newsome <tim@sifive.com>2019-09-27 12:07:00 -0700
committerTim Newsome <tim@sifive.com>2019-09-27 12:07:00 -0700
commit9aac179cf28fe2af49efd6eeccc6cfcea9b2db3b (patch)
tree294eb974448b4c4aa89b6c58c21d398a88bd66af /tcl/target/stm32f7x.cfg
parentbbdc28e0f5f9ca6b706d20bdd1fdfc2ab4a3b825 (diff)
parent31100927203a4e9d5e4f8e019b1a9e1c9d7b51c6 (diff)
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Merge branch 'master' into from_upstream
Change-Id: I036350ee06aa396344fb8a80c7dba148ec24c9c8
Diffstat (limited to 'tcl/target/stm32f7x.cfg')
-rwxr-xr-xtcl/target/stm32f7x.cfg13
1 files changed, 13 insertions, 0 deletions
diff --git a/tcl/target/stm32f7x.cfg b/tcl/target/stm32f7x.cfg
index b777c61..ba1d12f 100755
--- a/tcl/target/stm32f7x.cfg
+++ b/tcl/target/stm32f7x.cfg
@@ -51,6 +51,19 @@ set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
flash bank $_CHIPNAME.otp stm32f2x 0x1ff0f000 0 0 0 $_TARGETNAME
+# On the STM32F7, the Flash is mapped at address 0x08000000 via the AXI and
+# also address 0x00200000 via the ITCM. The former mapping is read-write in
+# hardware, while the latter is read-only. By presenting an alias, we
+# accomplish two things:
+# (1) We allow writing at 0x00200000 (because the alias acts identically to the
+# original bank), which allows code intended to run from that address to
+# also be linked for loading at that address, simplifying linking.
+# (2) We allow the proper memory map to be delivered to GDB, which will cause
+# it to use hardware breakpoints at the 0x00200000 mapping (correctly
+# identifying it as Flash), which it would otherwise not do. Configuring
+# the Flash via ITCM alias as virtual
+flash bank $_CHIPNAME.itcm-flash.alias virtual 0x00200000 0 0 0 $_TARGETNAME $_FLASHNAME
+
# adapter speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
adapter_khz 2000