aboutsummaryrefslogtreecommitdiff
path: root/tcl/target/stm32f0x.cfg
diff options
context:
space:
mode:
authorAntonio Borneo <borneo.antonio@gmail.com>2019-08-23 15:51:00 +0200
committerOleksij Rempel <linux@rempel-privat.de>2020-01-29 06:34:43 +0000
commit38ac08c1c25adf42cf20e48e10e6ddeab6a12d71 (patch)
tree4bfcc09b2f97bb1202aa3a4b4a02f9515ef7ed63 /tcl/target/stm32f0x.cfg
parent0d598535a30ea553f5a5d4a0047010807fcc5996 (diff)
downloadriscv-openocd-38ac08c1c25adf42cf20e48e10e6ddeab6a12d71.zip
riscv-openocd-38ac08c1c25adf42cf20e48e10e6ddeab6a12d71.tar.gz
riscv-openocd-38ac08c1c25adf42cf20e48e10e6ddeab6a12d71.tar.bz2
tcl: replace the deprecated commands with "adapter ..."
Avoid annoying "deprecated" messages while running the scripts distributed with OpenOCD code. Change automatically created with commands sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f) Minor indentation issue fixed manually in tcl/board/at91sam9g20-ek.cfg tcl/target/at91sam9260_ext_RAM_ext_flash.cfg Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5284 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Diffstat (limited to 'tcl/target/stm32f0x.cfg')
-rw-r--r--tcl/target/stm32f0x.cfg8
1 files changed, 4 insertions, 4 deletions
diff --git a/tcl/target/stm32f0x.cfg b/tcl/target/stm32f0x.cfg
index baac9b6..b20d036 100644
--- a/tcl/target/stm32f0x.cfg
+++ b/tcl/target/stm32f0x.cfg
@@ -52,9 +52,9 @@ set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f1x 0x08000000 $_FLASH_SIZE 0 0 $_TARGETNAME
# adapter speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
-adapter_khz 1000
+adapter speed 1000
-adapter_nsrst_delay 100
+adapter srst delay 100
reset_config srst_nogate
@@ -66,7 +66,7 @@ if {![using_hla]} {
proc stm32f0x_default_reset_start {} {
# Reset clock is HSI (8 MHz)
- adapter_khz 1000
+ adapter speed 1000
}
proc stm32f0x_default_examine_end {} {
@@ -86,7 +86,7 @@ proc stm32f0x_default_reset_init {} {
mmw 0x40021004 0x00000002 0 ;# RCC_CFGR |= SW[1]
# Boost JTAG frequency
- adapter_khz 8000
+ adapter speed 8000
}
# Default hooks