aboutsummaryrefslogtreecommitdiff
path: root/tcl/memory.tcl
diff options
context:
space:
mode:
authorTarek BOCHKATI <tarek.bouchkati@gmail.com>2020-03-09 15:10:17 +0100
committerTomas Vanek <vanekt@fbl.cz>2020-03-23 21:52:10 +0000
commitc999fcef3e96fbdb5226b0913bddf29365566ce8 (patch)
treef0a4069b1c2d0dd6e14901776e4a5501ef43839d /tcl/memory.tcl
parent4b4389a2d69d96e08d2b417e47c24cad6b50a5c5 (diff)
downloadriscv-openocd-c999fcef3e96fbdb5226b0913bddf29365566ce8.zip
riscv-openocd-c999fcef3e96fbdb5226b0913bddf29365566ce8.tar.gz
riscv-openocd-c999fcef3e96fbdb5226b0913bddf29365566ce8.tar.bz2
flash/stm32l4x: add support of STM32WLEx devices
STM32WLEx devices are based on arm Cortex-M4 running at 48MHz, contains a single bank of maximum 256 Kbytes of flash memory. there is 3 variants with different Flash/RAM sizes: STM32WLE5JC : 256K/64K STM32WLE5JB : 128K/48K STM32WLE5J8 : 64K/20K the work-area size is set to 20 kb to fit in STM32WLE5J8 Change-Id: Ie8e186fe4be97cbc25c53ef0ade4b4dbbcee6f66 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5450 Tested-by: jenkins Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'tcl/memory.tcl')
0 files changed, 0 insertions, 0 deletions