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| author | Robert Kovacsics <kovirobi@gmail.com> | 2023-08-19 15:36:27 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2023-09-02 10:40:34 +0000 |
| commit | 18281b0c497694d91c5608be54583172838be75c (patch) | |
| tree | 7bbe037041f9fc47f056a3aec57a8ed631ce7968 /tcl/cpu/arc/v2.tcl | |
| parent | ea0ac6dc779f09fd21e007d93987a6a7eca5149e (diff) | |
| download | riscv-openocd-18281b0c497694d91c5608be54583172838be75c.zip riscv-openocd-18281b0c497694d91c5608be54583172838be75c.tar.gz riscv-openocd-18281b0c497694d91c5608be54583172838be75c.tar.bz2 | |
tcl/arc: Fix ARC v2 registers r22/r23
There was a typo in the register numbering.
Signed-off-by: Robert Kovacsics <kovirobi@gmail.com>
Change-Id: Ie5d306725962c42f1bce976b80968145e6d0a177
Reviewed-on: https://review.openocd.org/c/openocd/+/7860
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Diffstat (limited to 'tcl/cpu/arc/v2.tcl')
| -rw-r--r-- | tcl/cpu/arc/v2.tcl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcl/cpu/arc/v2.tcl b/tcl/cpu/arc/v2.tcl index d28b9d9..b24a67d 100644 --- a/tcl/cpu/arc/v2.tcl +++ b/tcl/cpu/arc/v2.tcl @@ -173,8 +173,8 @@ proc arc_v2_init_regs { } { r19 19 uint32 r20 20 uint32 r21 21 uint32 - r22 23 uint32 - r23 24 uint32 + r22 22 uint32 + r23 23 uint32 r24 24 uint32 r25 25 uint32 gp 26 data_ptr |