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authorAntonio Borneo <borneo.antonio@gmail.com>2020-04-26 01:25:32 +0200
committerAntonio Borneo <borneo.antonio@gmail.com>2020-05-09 14:37:35 +0100
commit6d3cb807aaa60c4a4cd8ed49ae7860097bc1b3ce (patch)
tree640141d18db683148a763d8860eb21fbf04cedb6 /tcl/board
parent3a28cdc7cb790e388f0e142510858bee0b642597 (diff)
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tcl: fix typo and spelling
Identified by checkpatch script from Linux kernel v5.7-rc1 using the command find tcl/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types TYPO_SPELLING --strict -f {} \; Change-Id: I7b523f0ab5ec047ff167742a44c29984ac672cf4 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5615 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
Diffstat (limited to 'tcl/board')
-rw-r--r--tcl/board/alphascale_asm9260_ek.cfg2
-rw-r--r--tcl/board/at91sam9g20-ek.cfg2
-rw-r--r--tcl/board/icnova_imx53_sodimm.cfg2
-rw-r--r--tcl/board/imx35pdk.cfg4
-rw-r--r--tcl/board/imx53-m53evk.cfg2
-rw-r--r--tcl/board/imx53loco.cfg2
-rw-r--r--tcl/board/kindle2.cfg2
-rw-r--r--tcl/board/phone_se_j100i.cfg2
-rw-r--r--tcl/board/snps_em_sk.cfg2
-rw-r--r--tcl/board/snps_em_sk_v1.cfg2
-rw-r--r--tcl/board/snps_em_sk_v2.1.cfg2
-rw-r--r--tcl/board/snps_em_sk_v2.2.cfg2
-rw-r--r--tcl/board/steval_pcc010.cfg2
-rw-r--r--tcl/board/telo.cfg2
-rw-r--r--tcl/board/topas910.cfg2
-rw-r--r--tcl/board/topasa900.cfg2
-rw-r--r--tcl/board/twr-k60f120m.cfg2
-rw-r--r--tcl/board/twr-k60n512.cfg2
18 files changed, 19 insertions, 19 deletions
diff --git a/tcl/board/alphascale_asm9260_ek.cfg b/tcl/board/alphascale_asm9260_ek.cfg
index 46e8a5b..1c12682 100644
--- a/tcl/board/alphascale_asm9260_ek.cfg
+++ b/tcl/board/alphascale_asm9260_ek.cfg
@@ -23,7 +23,7 @@ $_TARGETNAME configure -event reset-init {
# select PLL as main source
mww 0x80040120 0x1
- # disable and enble main clk to update changes?
+ # disable and enable main clk to update changes?
mww 0x80040124 0x0
mww 0x80040124 0x1
diff --git a/tcl/board/at91sam9g20-ek.cfg b/tcl/board/at91sam9g20-ek.cfg
index e801876..9e0413a 100644
--- a/tcl/board/at91sam9g20-ek.cfg
+++ b/tcl/board/at91sam9g20-ek.cfg
@@ -169,7 +169,7 @@ proc at91sam9g20_reset_init { } {
# TRC = 9 cycles
# TWR = 2 cycles
# 9 column, 13 row, 4 banks
- # refresh equal to or less then 7.8 us for commerical/industrial rated devices
+ # refresh equal to or less then 7.8 us for commercial/industrial rated devices
#
# Thus SDRAM_CR = 0xa6339279
diff --git a/tcl/board/icnova_imx53_sodimm.cfg b/tcl/board/icnova_imx53_sodimm.cfg
index 2345ef1..dce9c47 100644
--- a/tcl/board/icnova_imx53_sodimm.cfg
+++ b/tcl/board/icnova_imx53_sodimm.cfg
@@ -22,7 +22,7 @@ jtag_rclk 1000
$_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 }
$_TARGETNAME configure -event "reset-assert" {
- echo "Reseting ...."
+ echo "Resetting ...."
#cortex_a dbginit
}
diff --git a/tcl/board/imx35pdk.cfg b/tcl/board/imx35pdk.cfg
index b5aa752..b81c0b0 100644
--- a/tcl/board/imx35pdk.cfg
+++ b/tcl/board/imx35pdk.cfg
@@ -170,11 +170,11 @@ proc imx35pdk_init { } {
mww 0xB8001010 0x00000304
#--------------------------------------------
- # Init 32-bit DDR2 memeory on CSD0
+ # Init 32-bit DDR2 memory on CSD0
# COL=10-bit, ROW=13-bit, BA[1:0]=Addr[26:25]
#--------------------------------------------
- # ESD_ESDCFG0 : set timing paramters
+ # ESD_ESDCFG0 : set timing parameters
mww 0xB8001004 0x007ffC2f
# ESD_ESDCTL0 : select Prechare-All mode
diff --git a/tcl/board/imx53-m53evk.cfg b/tcl/board/imx53-m53evk.cfg
index d18afc7..baeb3cd 100644
--- a/tcl/board/imx53-m53evk.cfg
+++ b/tcl/board/imx53-m53evk.cfg
@@ -21,7 +21,7 @@ reset_config trst_and_srst separate trst_open_drain srst_open_drain
adapter speed 6000
$_TARGETNAME configure -event "reset-assert" {
- echo "Reseting ...."
+ echo "Resetting ...."
#cortex_a dbginit
}
diff --git a/tcl/board/imx53loco.cfg b/tcl/board/imx53loco.cfg
index 57473ea..18caca5 100644
--- a/tcl/board/imx53loco.cfg
+++ b/tcl/board/imx53loco.cfg
@@ -23,7 +23,7 @@ $_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 }
#jtag_ntrst_delay 200
$_TARGETNAME configure -event "reset-assert" {
- echo "Reseting ...."
+ echo "Resetting ...."
#cortex_a dbginit
}
diff --git a/tcl/board/kindle2.cfg b/tcl/board/kindle2.cfg
index fbb1022..a39f15c 100644
--- a/tcl/board/kindle2.cfg
+++ b/tcl/board/kindle2.cfg
@@ -162,7 +162,7 @@ proc kindle2_sdram_init {} {
# LPDDR1 Initialization script
mww 0xb8001010 0x00000002
mww 0xb8001010 0x00000004
- # ESDCFG0: set timing paramters
+ # ESDCFG0: set timing parameters
mww 0xb8001004 0x007fff7f
# ESDCTL0: select Prechare-All mode
mww 0xb8001000 0x92100000
diff --git a/tcl/board/phone_se_j100i.cfg b/tcl/board/phone_se_j100i.cfg
index 6326590..ec61425 100644
--- a/tcl/board/phone_se_j100i.cfg
+++ b/tcl/board/phone_se_j100i.cfg
@@ -1,7 +1,7 @@
#
# Sony Ericsson J100I Phone
#
-# more informations can be found on
+# more information can be found on
# http://bb.osmocom.org/trac/wiki/SonyEricssonJ100i
#
source [find target/ti_calypso.cfg]
diff --git a/tcl/board/snps_em_sk.cfg b/tcl/board/snps_em_sk.cfg
index 63c39a4..3d93407 100644
--- a/tcl/board/snps_em_sk.cfg
+++ b/tcl/board/snps_em_sk.cfg
@@ -9,7 +9,7 @@
#
# Configure JTAG cable
-# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1.
+# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1.
source [find interface/ftdi/digilent-hs1.cfg]
# 5MHz seems to work good with all cores that might happen in 2.x
diff --git a/tcl/board/snps_em_sk_v1.cfg b/tcl/board/snps_em_sk_v1.cfg
index 2e9d602..0c1539e 100644
--- a/tcl/board/snps_em_sk_v1.cfg
+++ b/tcl/board/snps_em_sk_v1.cfg
@@ -9,7 +9,7 @@
#
# Configure JTAG cable
-# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1.
+# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1.
source [find interface/ftdi/digilent-hs1.cfg]
adapter speed 10000
diff --git a/tcl/board/snps_em_sk_v2.1.cfg b/tcl/board/snps_em_sk_v2.1.cfg
index 5df8de5..c1fb232 100644
--- a/tcl/board/snps_em_sk_v2.1.cfg
+++ b/tcl/board/snps_em_sk_v2.1.cfg
@@ -9,7 +9,7 @@
#
# Configure JTAG cable
-# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1.
+# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1.
source [find interface/ftdi/digilent-hs1.cfg]
# JTAG 10MHz is too fast for EM7D FPU in EM SK 2.1 which has core frequency
diff --git a/tcl/board/snps_em_sk_v2.2.cfg b/tcl/board/snps_em_sk_v2.2.cfg
index 7f3708e..674d9f6 100644
--- a/tcl/board/snps_em_sk_v2.2.cfg
+++ b/tcl/board/snps_em_sk_v2.2.cfg
@@ -9,7 +9,7 @@
#
# Configure JTAG cable
-# EM Starter Kit has built-in FT2232 chip, which is similiar to Digilent HS-1.
+# EM Starter Kit has built-in FT2232 chip, which is similar to Digilent HS-1.
source [find interface/ftdi/digilent-hs1.cfg]
# EM11D reportedly requires 5 MHz. Other cores and board can work faster.
diff --git a/tcl/board/steval_pcc010.cfg b/tcl/board/steval_pcc010.cfg
index ddfdbb3..94108d1 100644
--- a/tcl/board/steval_pcc010.cfg
+++ b/tcl/board/steval_pcc010.cfg
@@ -1,5 +1,5 @@
# Use for the STM207VG plug-in board (1 MiB Flash and 112+16 KiB Ram
-# comming with the STEVAL-PCC010 board
+# coming with the STEVAL-PCC010 board
# http://www.st.com/internet/evalboard/product/251530.jsp
# or any other board with only a STM32F2x in the JTAG chain
diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg
index 05644f6..2c98ca3 100644
--- a/tcl/board/telo.cfg
+++ b/tcl/board/telo.cfg
@@ -1,5 +1,5 @@
source [find target/c100.cfg]
-# basic register defintion for C100
+# basic register definition for C100
source [find target/c100regs.tcl]
# board-config info
source [find target/c100config.tcl]
diff --git a/tcl/board/topas910.cfg b/tcl/board/topas910.cfg
index 77084a9..9f994c8 100644
--- a/tcl/board/topas910.cfg
+++ b/tcl/board/topas910.cfg
@@ -30,7 +30,7 @@ proc topas910_init { } {
# Init SDRAM
# _PMCDRV = 0x00000071;
# //
-# // Initialize SDRAM timing paramater
+# // Initialize SDRAM timing parameter
# //
# _DMC_CAS_LATENCY = 0x00000006;
# _DMC_T_DQSS = 0x00000000;
diff --git a/tcl/board/topasa900.cfg b/tcl/board/topasa900.cfg
index 5bd0e5e..4fa6383 100644
--- a/tcl/board/topasa900.cfg
+++ b/tcl/board/topasa900.cfg
@@ -37,7 +37,7 @@ proc topasa900_init { } {
# Init SDRAM
# _PMCDRV = 0x00000071;
# //
-# // Initialize SDRAM timing paramater
+# // Initialize SDRAM timing parameter
# //
# _DMC_CAS_LATENCY = 0x00000006;
# _DMC_T_DQSS = 0x00000000;
diff --git a/tcl/board/twr-k60f120m.cfg b/tcl/board/twr-k60f120m.cfg
index e96d045..c4d87db 100644
--- a/tcl/board/twr-k60f120m.cfg
+++ b/tcl/board/twr-k60f120m.cfg
@@ -5,7 +5,7 @@
source [find target/k60.cfg]
$_TARGETNAME configure -event reset-init {
- puts "-event reset-init occured"
+ puts "-event reset-init occurred"
}
#
diff --git a/tcl/board/twr-k60n512.cfg b/tcl/board/twr-k60n512.cfg
index d2312cf..5babeb8 100644
--- a/tcl/board/twr-k60n512.cfg
+++ b/tcl/board/twr-k60n512.cfg
@@ -5,7 +5,7 @@
source [find target/k60.cfg]
$_TARGETNAME configure -event reset-init {
- puts "-event reset-init occured"
+ puts "-event reset-init occurred"
}
#
generated by cgit v1.1 at 2024-08-17 01:39:09 +0000