Merge up to ad87fbd1cf28760795c4e18f3318a2d720e5a8a6 from upstream

Conflicts:

* `doc/openocd.texi`: due to d382c95d57c0ad9ed2dcc83c95404babb7647708,
resolved by selecting the upstream version.

* `src/server/gdb_server.c`: between
944fe66f104e356c5fcd2b5c25200cebef9b389c and
92e8823ebdb6d01b41bb5d79af49501d525acd1d. Resolved by adopting the use
of `LOG_TARGET_*`.
* `src/target/target.c`: between
639e68a621b7ae8c4a296ca7e45b47075268fded and
c5358c84ad0d3e7497498e0457cec7785f72910a, selected the version from
`riscv-openocd`.

Change-Id: Ic1327f25e147945e0ec82947a82452501e8ee5de

3 files changed, 72 insertions, 0 deletions

diff --git a/tcl/board/digilent_nexys2.cfg b/tcl/board/digilent_nexys2.cfg
new file mode 100644
index 0000000..c1c5b2a
--- /dev/null
+++ b/tcl/board/digilent_nexys2.cfg
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# https://digilent.com/reference/programmable-logic/nexys-2/start
+#
+# The Digilent Nexy2 normally requires proprietary tools to program and will
+# enumerate as:
+#   ID 1443:0005 1443 ONBOARD USB
+#
+# However, the ixo-usb-jtag project provides an alternative open firmware for
+# the on board programmer. When using this firmware the board will then
+# enumerate as:
+#   ID 16c0:06ad ixo.de USB-JTAG-IF (With SerialNumber == hw_nexys)
+#
+# See the interface/usb-jtag.cfg for more information.
+
+source [find interface/usb-jtag.cfg]
+source [find cpld/xilinx-xcf-s.cfg]
+source [find fpga/xilinx-xc3s.cfg]
+
+# Usage:
+#
+# Load Bitstream into FPGA:
+#    openocd -f board/digilent_nexys2.cfg -c "init;\
+#    pld load 0 bitstream.bit;\
+#    shutdown"
+
+# Read Unique Device Identifier (DNA):
+#    openocd -f board/digilent_nexys2.cfg -c "init;\
+#    xilinx_print_dna [xc3s_get_dna xc3s.tap];\
+#    shutdown"
diff --git a/tcl/board/nxp/frdm-kv11z-jlink.cfg b/tcl/board/nxp/frdm-kv11z-jlink.cfg
new file mode 100644
index 0000000..725a37b
--- /dev/null
+++ b/tcl/board/nxp/frdm-kv11z-jlink.cfg
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Configuration file for NXP FRDM-KV11Z development boards.
+#
+# This configuration file is only for FRDM-KV11Z development boards with the
+# SEGGER J-Link OpenSDA firmware, see:
+# https://www.segger.com/products/debug-probes/j-link/models/other-j-links/opensda-sda-v2/
+
+source [find interface/jlink.cfg]
+
+# Set working area size to 16 KiB.
+set WORKAREASIZE 0x4000
+
+# Set the chip name.
+set CHIPNAME kv11z
+
+transport select swd
+
+source [find target/kx.cfg]
+
+reset_config srst_only
diff --git a/tcl/board/nxp/frdm-kv31f-jlink.cfg b/tcl/board/nxp/frdm-kv31f-jlink.cfg
new file mode 100644
index 0000000..e55a01c
--- /dev/null
+++ b/tcl/board/nxp/frdm-kv31f-jlink.cfg
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Configuration file for NXP FRDM-KV31F development boards.
+#
+# This configuration file is only for FRDM-KV31F development boards with the
+# SEGGER J-Link OpenSDA firmware, see:
+# https://www.segger.com/products/debug-probes/j-link/models/other-j-links/opensda-sda-v2/
+
+source [find interface/jlink.cfg]
+
+# Set working area size to 32 KiB.
+set WORKAREASIZE 0x8000
+
+# Set the chip name.
+set CHIPNAME kv31f
+
+transport select swd
+
+source [find target/kx.cfg]
+
+reset_config srst_only