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| author | Spencer Oliver <spen@spen-soft.co.uk> | 2013-01-10 14:04:36 +0000 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2013-02-02 16:22:19 +0000 |
| commit | f4f87cb4726fbba4a03e2eda1759faf1c47ab4ba (patch) | |
| tree | 3966ecb3a37e1aa1093a4fe6a3470af1bb4de37a /src | |
| parent | 98709ab461103de8a6b051b1b890c4c4bdc8f7be (diff) | |
| download | riscv-openocd-f4f87cb4726fbba4a03e2eda1759faf1c47ab4ba.zip riscv-openocd-f4f87cb4726fbba4a03e2eda1759faf1c47ab4ba.tar.gz riscv-openocd-f4f87cb4726fbba4a03e2eda1759faf1c47ab4ba.tar.bz2 | |
armv7m: restore core mode after executing algorithm
Make sure we restore the core mode after executing any algorithm.
We also now check that we actually need to swap the core mode, we may
already be in the correct mode.
Change-Id: Ia48af2c108e0f9868aae241bf25f60323503f092
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1107
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/armv7m.c | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 6814fdb..9740a28 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -384,13 +384,23 @@ int armv7m_start_algorithm(struct target *target, armv7m_set_core_reg(reg, reg_params[i].value); } - if (armv7m_algorithm_info->core_mode != ARM_MODE_ANY) { + if (armv7m_algorithm_info->core_mode != ARM_MODE_ANY && + armv7m_algorithm_info->core_mode != core_mode) { + + /* we cannot set ARM_MODE_HANDLER, so use ARM_MODE_THREAD instead */ + if (armv7m_algorithm_info->core_mode == ARM_MODE_HANDLER) { + armv7m_algorithm_info->core_mode = ARM_MODE_THREAD; + LOG_INFO("ARM_MODE_HANDLER not currently supported, using ARM_MODE_THREAD instead"); + } + LOG_DEBUG("setting core_mode: 0x%2.2x", armv7m_algorithm_info->core_mode); buf_set_u32(armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].value, 0, 1, armv7m_algorithm_info->core_mode); armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].dirty = 1; armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].valid = 1; } + + /* save previous core mode */ armv7m_algorithm_info->core_mode = core_mode; retval = target_resume(target, 0, entry_point, 1, 1); @@ -486,6 +496,15 @@ int armv7m_wait_algorithm(struct target *target, } } + /* restore previous core mode */ + if (armv7m_algorithm_info->core_mode != armv7m->arm.core_mode) { + LOG_DEBUG("restoring core_mode: 0x%2.2x", armv7m_algorithm_info->core_mode); + buf_set_u32(armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].value, + 0, 1, armv7m_algorithm_info->core_mode); + armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].dirty = 1; + armv7m->arm.core_cache->reg_list[ARMV7M_CONTROL].valid = 1; + } + armv7m->arm.core_mode = armv7m_algorithm_info->core_mode; return retval; |