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| author | Peter Collingbourne <pcc@google.com> | 2023-09-27 17:02:03 -0700 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2023-11-18 11:20:56 +0000 |
| commit | ee96a95d44322aa109847e35b86aed5ad3066cf8 (patch) | |
| tree | 4ddab1ee185ef8725d65cdd97f3e378a5e7558e9 /src | |
| parent | 851d1ad87a6e9f1ae1b44b8ac395138031290488 (diff) | |
| download | riscv-openocd-ee96a95d44322aa109847e35b86aed5ad3066cf8.zip riscv-openocd-ee96a95d44322aa109847e35b86aed5ad3066cf8.tar.gz riscv-openocd-ee96a95d44322aa109847e35b86aed5ad3066cf8.tar.bz2 | |
openocd: src/target: Correctly handle CCSIDR_EL1.Associativity=0
Associativity=0 means that only one CMO is needed for all ways.
It could also mean that the cache is 1-way, but this is less likely.
Currently Associativity=0 causes us to hang in the while loop in
decode_cache_reg. Fix it by skipping the loop in this case. We can let
way_shift be set to the arbitrary value of 0 because in the case where
Associativity=0 we only ever shift 0 by it before ORing it into the
CMO operand.
Change-Id: I7c1de68d33f6b3ed627cbb1e2401d43185e4c1e3
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/armv8_cache.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c index cf71119..98f4b3f 100644 --- a/src/target/armv8_cache.c +++ b/src/target/armv8_cache.c @@ -286,8 +286,9 @@ static struct armv8_cachesize decode_cache_reg(uint32_t cache_reg) size.index = (cache_reg >> 13) & 0x7fff; size.way = ((cache_reg >> 3) & 0x3ff); - while (((size.way << i) & 0x80000000) == 0) - i++; + if (size.way != 0) + while (((size.way << i) & 0x80000000) == 0) + i++; size.way_shift = i; return size; |