debug interface: get rid of unused pre_debug fn

Removing unused code makes it much less mysterius.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>

9 files changed, 0 insertions, 16 deletions

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 3275584..45394b7 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1391,9 +1391,6 @@ int arm7_9_debug_entry(target_t *target)
 	LOG_DEBUG("-");
 #endif
 
-	if (arm7_9->pre_debug_entry)
-		arm7_9->pre_debug_entry(target);
-
 	/* program EmbeddedICE Debug Control Register to assert DBGACK and INTDIS
 	 * ensure that DBGRQ is cleared
 	 */
diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h
index b3c3c58..80f8fc7 100644
--- a/src/target/arm7_9_common.h
+++ b/src/target/arm7_9_common.h
@@ -102,7 +102,6 @@ typedef struct arm7_9_common_s
 
 	void (*set_special_dbgrq)(target_t *target); /**< Function for setting DBGRQ if the normal way won't work */
 
-	void (*pre_debug_entry)(target_t *target); /**< Callback function called before entering debug mode */
 	void (*post_debug_entry)(target_t *target); /**< Callback function called after entering debug mode */
 
 	void (*pre_restore_context)(target_t *target); /**< Callback function called before restoring the processor context */
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 0e978c2..253bdf0 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -801,7 +801,6 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_
 	arm7_9->enable_single_step = arm7_9_enable_eice_step;
 	arm7_9->disable_single_step = arm7_9_disable_eice_step;
 
-	arm7_9->pre_debug_entry = NULL;
 	arm7_9->post_debug_entry = NULL;
 
 	arm7_9->pre_restore_context = NULL;
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 9c90f00..ac233f6 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -902,7 +902,6 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_
 	arm7_9->enable_single_step = arm9tdmi_enable_single_step;
 	arm7_9->disable_single_step = arm9tdmi_disable_single_step;
 
-	arm7_9->pre_debug_entry = NULL;
 	arm7_9->post_debug_entry = NULL;
 
 	arm7_9->pre_restore_context = NULL;
diff --git a/src/target/armv7a.h b/src/target/armv7a.h
index 5814c13..c5e3257 100644
--- a/src/target/armv7a.h
+++ b/src/target/armv7a.h
@@ -120,7 +120,6 @@ typedef struct armv7a_common_s
 			uint32_t CRn, uint32_t CRm, uint32_t value);
 
 	int (*examine_debug_reason)(target_t *target);
-	void (*pre_debug_entry)(target_t *target);
 	void (*post_debug_entry)(target_t *target);
 
 	void (*pre_restore_context)(target_t *target);
diff --git a/src/target/armv7m.h b/src/target/armv7m.h
index f3a7422..2ee92f4 100644
--- a/src/target/armv7m.h
+++ b/src/target/armv7m.h
@@ -108,7 +108,6 @@ typedef struct armv7m_common_s
 	int (*write_core_reg)(struct target_s *target, int num);
 
 	int (*examine_debug_reason)(target_t *target);
-	void (*pre_debug_entry)(target_t *target);
 	void (*post_debug_entry)(target_t *target);
 
 	void (*pre_restore_context)(target_t *target);
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 025a468..e716999 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -637,9 +637,6 @@ int cortex_a8_debug_entry(target_t *target)
 	cortex_a8_common_t *cortex_a8 = armv7a->arch_info;
 	swjdp_common_t *swjdp = &armv7a->swjdp_info;
 
-	if (armv7a->pre_debug_entry)
-		armv7a->pre_debug_entry(target);
-
 	LOG_DEBUG("dscr = 0x%08" PRIx32, cortex_a8->cpudbg_dscr);
 
 	/* Enable the ITR execution once we are in debug mode */
@@ -1586,7 +1583,6 @@ LOG_DEBUG(" ");
 	/* register arch-specific functions */
 	armv7a->examine_debug_reason = NULL;
 
-	armv7a->pre_debug_entry = NULL;
 	armv7a->post_debug_entry = cortex_a8_post_debug_entry;
 
 	armv7a->pre_restore_context = NULL;
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index 1c59f02..e854f6b 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -322,8 +322,6 @@ static int cortex_m3_debug_entry(target_t *target)
 	swjdp_common_t *swjdp = &armv7m->swjdp_info;
 
 	LOG_DEBUG(" ");
-	if (armv7m->pre_debug_entry)
-		armv7m->pre_debug_entry(target);
 
 	cortex_m3_clear_halt(target);
 	mem_ap_read_atomic_u32(swjdp, DCB_DHCSR, &cortex_m3->dcb_dhcsr);
@@ -1610,7 +1608,6 @@ static int cortex_m3_init_arch_info(target_t *target,
 	/* register arch-specific functions */
 	armv7m->examine_debug_reason = cortex_m3_examine_debug_reason;
 
-	armv7m->pre_debug_entry = NULL;
 	armv7m->post_debug_entry = NULL;
 
 	armv7m->pre_restore_context = NULL;
diff --git a/src/target/fa526.c b/src/target/fa526.c
index eee9e50..9cdbf3d 100644
--- a/src/target/fa526.c
+++ b/src/target/fa526.c
@@ -346,7 +346,6 @@ int fa526_init_arch_info_2(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_t
 	arm7_9->enable_single_step = arm9tdmi_enable_single_step;
 	arm7_9->disable_single_step = arm9tdmi_disable_single_step;
 
-	arm7_9->pre_debug_entry = NULL;
 	arm7_9->post_debug_entry = NULL;
 
 	arm7_9->pre_restore_context = NULL;