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author | Tim Newsome <tim@sifive.com> | 2022-10-04 15:31:09 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2022-10-05 10:23:45 -0700 |
commit | 0f12a0100757378099f0ec0678ed1d222fadbc76 (patch) | |
tree | 6360cab81a3cab7b2ce3aa4f9528dcc2c9da1cba /src | |
parent | 088a3596a034a1bbe1e07483914d94fa0cad6ea0 (diff) | |
download | riscv-openocd-0f12a0100757378099f0ec0678ed1d222fadbc76.zip riscv-openocd-0f12a0100757378099f0ec0678ed1d222fadbc76.tar.gz riscv-openocd-0f12a0100757378099f0ec0678ed1d222fadbc76.tar.bz2 |
riscv: Minor formatting cleanup.
Change-Id: I0256fd047d8369ca7b327172225a9d1f827673c5
Signed-off-by: Tim Newsome <tim@sifive.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/target/riscv/riscv-013.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c index 494eeaa..6a96e92 100644 --- a/src/target/riscv/riscv-013.c +++ b/src/target/riscv/riscv-013.c @@ -2467,15 +2467,13 @@ static int execute_fence(struct target *target) /* FIXME: For non-coherent systems we need to flush the caches right * here, but there's no ISA-defined way of doing that. */ - { - struct riscv_program program; - riscv_program_init(&program, target); - riscv_program_fence_i(&program); - riscv_program_fence(&program); - int result = riscv_program_exec(&program, target); - if (result != ERROR_OK) - LOG_DEBUG("Unable to execute pre-fence"); - } + struct riscv_program program; + riscv_program_init(&program, target); + riscv_program_fence_i(&program); + riscv_program_fence(&program); + int result = riscv_program_exec(&program, target); + if (result != ERROR_OK) + LOG_TARGET_DEBUG(target, "Unable to execute pre-fence"); return ERROR_OK; } |