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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2022-01-15 15:44:20 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2022-05-14 08:52:30 +0000 |
| commit | d4335071b8460b227889a3a2072df424eebb4e5e (patch) | |
| tree | 2cfe586bdd364dda0e568f8da68e8b136e58e712 /src/target | |
| parent | 209cb38aa155825175e2806d6093cecb5d77edc1 (diff) | |
| download | riscv-openocd-d4335071b8460b227889a3a2072df424eebb4e5e.zip riscv-openocd-d4335071b8460b227889a3a2072df424eebb4e5e.tar.gz riscv-openocd-d4335071b8460b227889a3a2072df424eebb4e5e.tar.bz2 | |
arm_adi_v5: report sysmem on class 0x9 ROM tables
As Class 0x1 ROM table, also Class 0x9 ROM tables encodes a flag
for system memory access.
Detect the flag in rtp_cs_component() and dump the same message
for both type of ROM tables.
Extend rtp_read_cs_regs() to read ARM_CS_C9_DEVID.
Change-Id: Ic85d1ea068ed706ceedfd65076ff4c96d04e9792
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6817
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/arm_adi_v5.c | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 4176dca..5c3941b 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -1099,6 +1099,7 @@ struct cs_component_vals { uint64_t pid; uint32_t cid; uint32_t devarch; + uint32_t devid; uint32_t devtype_memtype; }; @@ -1124,13 +1125,16 @@ static int rtp_read_cs_regs(struct adiv5_ap *ap, target_addr_t component_base, /* sort by offset to gain speed */ /* - * Registers DEVARCH and DEVTYPE are valid on Class 0x9 devices + * Registers DEVARCH, DEVID and DEVTYPE are valid on Class 0x9 devices * only, but are at offset above 0xf00, so can be read on any device * without triggering error. Read them for eventual use on Class 0x9. */ if (retval == ERROR_OK) retval = mem_ap_read_u32(ap, component_base + ARM_CS_C9_DEVARCH, &v->devarch); + if (retval == ERROR_OK) + retval = mem_ap_read_u32(ap, component_base + ARM_CS_C9_DEVID, &v->devid); + /* Same address as ARM_CS_C1_MEMTYPE */ if (retval == ERROR_OK) retval = mem_ap_read_u32(ap, component_base + ARM_CS_C9_DEVTYPE, &v->devtype_memtype); @@ -1609,6 +1613,11 @@ static int rtp_cs_component(struct command_invocation *cmd, if ((v.devarch & DEVARCH_ID_MASK) != DEVARCH_ROM_C_0X9) return ERROR_OK; + if (v.devid & ARM_CS_C9_DEVID_SYSMEM_MASK) + command_print(cmd, "\t\tMEMTYPE system memory present on bus"); + else + command_print(cmd, "\t\tMEMTYPE system memory not present: dedicated debug bus"); + return rtp_rom_loop(cmd, ap, base_address, depth, 512); } |