target/armv8: change prototype of display_cache_info()

To prepare for handling TCL return values consistently, all calls
to command_print/command_print_sameline should be ready to switch
to CMD as first parameter.

Change prototype of display_cache_info(),
armv8_handle_inner_cache_info_command() and
armv8_handle_cache_info_command() to pass CMD instead of CMD_CTX.

This change was part of http://openocd.zylin.com/1815 from Paul
Fertser and has been extracted and rebased to simplify the review.

Change-Id: I13519c79af82cdba57d5205ba84a5a27fce65a36
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5066
Tested-by: jenkins

4 files changed, 10 insertions, 10 deletions

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index ff68e3a..68ae9f1 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -2533,7 +2533,7 @@ COMMAND_HANDLER(aarch64_handle_cache_info_command)
 	struct target *target = get_current_target(CMD_CTX);
 	struct armv8_common *armv8 = target_to_armv8(target);
 
-	return armv8_handle_cache_info_command(CMD_CTX,
+	return armv8_handle_cache_info_command(CMD,
 			&armv8->armv8_mmu.armv8_cache);
 }
 
diff --git a/src/target/armv8.c b/src/target/armv8.c
index e271c1a..4054c95 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -1079,16 +1079,16 @@ COMMAND_HANDLER(armv8_handle_exception_catch_command)
 	return ERROR_OK;
 }
 
-int armv8_handle_cache_info_command(struct command_context *cmd_ctx,
+int armv8_handle_cache_info_command(struct command_invocation *cmd,
 	struct armv8_cache_common *armv8_cache)
 {
 	if (armv8_cache->info == -1) {
-		command_print(cmd_ctx, "cache not yet identified");
+		command_print(cmd->ctx, "cache not yet identified");
 		return ERROR_OK;
 	}
 
 	if (armv8_cache->display_cache_info)
-		armv8_cache->display_cache_info(cmd_ctx, armv8_cache);
+		armv8_cache->display_cache_info(cmd, armv8_cache);
 	return ERROR_OK;
 }
 
diff --git a/src/target/armv8.h b/src/target/armv8.h
index af00e52..1a61145 100644
--- a/src/target/armv8.h
+++ b/src/target/armv8.h
@@ -170,7 +170,7 @@ struct armv8_cache_common {
 	/* l2 external unified cache if some */
 	void *l2_cache;
 	int (*flush_all_data_cache)(struct target *target);
-	int (*display_cache_info)(struct command_context *cmd_ctx,
+	int (*display_cache_info)(struct command_invocation *cmd,
 			struct armv8_cache_common *armv8_cache);
 };
 
@@ -301,7 +301,7 @@ int armv8_mmu_translate_va_pa(struct target *target, target_addr_t va,
 		target_addr_t *val, int meminfo);
 int armv8_mmu_translate_va(struct target *target,  target_addr_t va, target_addr_t *val);
 
-int armv8_handle_cache_info_command(struct command_context *cmd_ctx,
+int armv8_handle_cache_info_command(struct command_invocation *cmd,
 		struct armv8_cache_common *armv8_cache);
 
 void armv8_set_cpsr(struct arm *arm, uint32_t cpsr);
diff --git a/src/target/armv8_cache.c b/src/target/armv8_cache.c
index 40965eb..a641d04 100644
--- a/src/target/armv8_cache.c
+++ b/src/target/armv8_cache.c
@@ -188,13 +188,13 @@ done:
 	return retval;
 }
 
-static int armv8_handle_inner_cache_info_command(struct command_context *cmd_ctx,
+static int armv8_handle_inner_cache_info_command(struct command_invocation *cmd,
 	struct armv8_cache_common *armv8_cache)
 {
 	int cl;
 
 	if (armv8_cache->info == -1) {
-		command_print(cmd_ctx, "cache not yet identified");
+		command_print(cmd->ctx, "cache not yet identified");
 		return ERROR_OK;
 	}
 
@@ -202,7 +202,7 @@ static int armv8_handle_inner_cache_info_command(struct command_context *cmd_ctx
 		struct armv8_arch_cache *arch = &(armv8_cache->arch[cl]);
 
 		if (arch->ctype & 1) {
-			command_print(cmd_ctx,
+			command_print(cmd->ctx,
 				"L%d I-Cache: linelen %" PRIi32
 				", associativity %" PRIi32
 				", nsets %" PRIi32
@@ -215,7 +215,7 @@ static int armv8_handle_inner_cache_info_command(struct command_context *cmd_ctx
 		}
 
 		if (arch->ctype >= 2) {
-			command_print(cmd_ctx,
+			command_print(cmd->ctx,
 				"L%d D-Cache: linelen %" PRIi32
 				", associativity %" PRIi32
 				", nsets %" PRIi32