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authorEvgeniy Didin <didin@synopsys.com>2020-03-16 15:00:16 +0300
committerOleksij Rempel <linux@rempel-privat.de>2020-05-08 15:09:46 +0100
commitc693508f7717d3e5cf118da38d4a5411c59cef1a (patch)
tree5abc43958cbbf2b8010cc9f3afce6c0103c3c22c /src/target
parent0af37282c742dfc3492348f44f66215939148fb0 (diff)
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target/arc: introduce arc_read/write_instruction functions
This commit introduces helper instruction read/write functions for further bp functionality. Change-Id: I619fbe2870ef6365c29ed1618bb83b6f7eb84690 Signed-off-by: Evgeniy Didin <didin@synopsys.com> Reviewed-on: http://openocd.zylin.com/5640 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Diffstat (limited to 'src/target')
-rw-r--r--src/target/arc.c56
-rw-r--r--src/target/arc.h23
2 files changed, 79 insertions, 0 deletions
diff --git a/src/target/arc.c b/src/target/arc.c
index 396bf8a..5bc6134 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -1285,6 +1285,62 @@ static int arc_target_create(struct target *target, Jim_Interp *interp)
return ERROR_OK;
}
+/**
+ * Write 4-byte instruction to memory. This is like target_write_u32, however
+ * in case of little endian ARC instructions are in middle endian format, not
+ * little endian, so different type of conversion should be done.
+ * Middle endinan: instruction "aabbccdd", stored as "bbaaddcc"
+ */
+int arc_write_instruction_u32(struct target *target, uint32_t address,
+ uint32_t instr)
+{
+ uint8_t value_buf[4];
+ if (!target_was_examined(target)) {
+ LOG_ERROR("Target not examined yet");
+ return ERROR_FAIL;
+ }
+
+ LOG_DEBUG("Address: 0x%08" PRIx32 ", value: 0x%08" PRIx32, address,
+ instr);
+
+ if (target->endianness == TARGET_LITTLE_ENDIAN)
+ arc_h_u32_to_me(value_buf, instr);
+ else
+ h_u32_to_be(value_buf, instr);
+
+ CHECK_RETVAL(target_write_buffer(target, address, 4, value_buf));
+
+ return ERROR_OK;
+}
+
+/**
+ * Read 32-bit instruction from memory. It is like target_read_u32, however in
+ * case of little endian ARC instructions are in middle endian format, so
+ * different type of conversion should be done.
+ */
+int arc_read_instruction_u32(struct target *target, uint32_t address,
+ uint32_t *value)
+{
+ uint8_t value_buf[4];
+
+ if (!target_was_examined(target)) {
+ LOG_ERROR("Target not examined yet");
+ return ERROR_FAIL;
+ }
+
+ *value = 0;
+ CHECK_RETVAL(target_read_buffer(target, address, 4, value_buf));
+
+ if (target->endianness == TARGET_LITTLE_ENDIAN)
+ *value = arc_me_to_h_u32(value_buf);
+ else
+ *value = be_to_h_u32(value_buf);
+
+ LOG_DEBUG("Address: 0x%08" PRIx32 ", value: 0x%08" PRIx32, address,
+ *value);
+
+ return ERROR_OK;
+}
/* Helper function which swiches core to single_step mode by
* doing aux r/w operations. */
diff --git a/src/target/arc.h b/src/target/arc.h
index c02787e..55a1ead 100644
--- a/src/target/arc.h
+++ b/src/target/arc.h
@@ -160,6 +160,29 @@ static inline struct arc_common *target_to_arc(struct target *target)
return target->arch_info;
}
+/* ----- Inlined functions ------------------------------------------------- */
+
+/**
+ * Convert data in host endianness to the middle endian. This is required to
+ * write 4-byte instructions.
+ */
+static inline void arc_h_u32_to_me(uint8_t *buf, int val)
+{
+ buf[1] = (uint8_t) (val >> 24);
+ buf[0] = (uint8_t) (val >> 16);
+ buf[3] = (uint8_t) (val >> 8);
+ buf[2] = (uint8_t) (val >> 0);
+}
+
+/**
+ * Convert data in middle endian to host endian. This is required to read 32-bit
+ * instruction from little endian ARCs.
+ */
+static inline uint32_t arc_me_to_h_u32(const uint8_t *buf)
+{
+ return (uint32_t)(buf[2] | buf[3] << 8 | buf[0] << 16 | buf[1] << 24);
+}
+
/* ARC Register description */
struct arc_reg_desc {