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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2021-09-08 12:49:50 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-10-02 13:12:26 +0000 |
| commit | ba1061fe1daf0071499e40da860350979105b69e (patch) | |
| tree | e49423622b77c91b8a30e485ec0771dbb357857f /src/target | |
| parent | c3993d3188da5976a64f47d4cbf4d7e5b63f0c8d (diff) | |
| download | riscv-openocd-ba1061fe1daf0071499e40da860350979105b69e.zip riscv-openocd-ba1061fe1daf0071499e40da860350979105b69e.tar.gz riscv-openocd-ba1061fe1daf0071499e40da860350979105b69e.tar.bz2 | |
target/cortex_m: enhance multi-core examine logs
Giving the example of STM32WL55x the examine log is the following:
Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints
After this change the examine log becomes:
Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected
Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected
Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints
Change-Id: I1873a75eb76f0819342c441129427b38e984f0df
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6553
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/cortex_m.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 5deb9bf..3412c56 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -2082,8 +2082,12 @@ int cortex_m_examine(struct target *target) armv7m->arm.arch = cortex_m->core_info->arch; - LOG_DEBUG("%s r%" PRId8 "p%" PRId8 " processor detected", - cortex_m->core_info->name, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf)); + LOG_INFO("%s: %s r%" PRId8 "p%" PRId8 " processor detected", + target_name(target), + cortex_m->core_info->name, + (uint8_t)((cpuid >> 20) & 0xf), + (uint8_t)((cpuid >> 0) & 0xf)); + cortex_m->maskints_erratum = false; if (core_partno == CORTEX_M7_PARTNO) { uint8_t rev, patch; @@ -2192,7 +2196,7 @@ int cortex_m_examine(struct target *target) cortex_m_dwt_setup(cortex_m, target); /* These hardware breakpoints only work for code in flash! */ - LOG_INFO("%s: hardware has %d breakpoints, %d watchpoints", + LOG_INFO("%s: target has %d breakpoints, %d watchpoints", target_name(target), cortex_m->fp_num_code, cortex_m->dwt_num_comp); |