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authorTomas Vanek <vanekt@fbl.cz>2021-04-06 13:46:07 +0200
committerTomas Vanek <vanekt@fbl.cz>2021-04-25 23:08:49 +0100
commitab337d05f432465fdfedb694ac862fb22f80d7a6 (patch)
tree8804c163a58b4539836e18744842af9081b36d68 /src/target
parent44554698472aae5b02620eb91837118ada4d2bfe (diff)
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target/arm_adi_v5: move DP register definitions to one block
DP and MEM-AP definitions were mixed. Change-Id: I2f691b2274c01e9090c1e5160c6903d3207e35c2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/6138 Tested-by: jenkins
Diffstat (limited to 'src/target')
-rw-r--r--src/target/arm_adi_v5.h17
1 files changed, 9 insertions, 8 deletions
diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index 047606c..00e4ea2 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -85,6 +85,15 @@
#define CSYSPWRUPREQ (1UL << 30)
#define CSYSPWRUPACK (1UL << 31)
+#define DP_SELECT_APSEL 0xFF000000
+#define DP_SELECT_APBANK 0x000000F0
+#define DP_SELECT_DPBANK 0x0000000F
+#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */
+
+#define DP_APSEL_MAX (255)
+#define DP_APSEL_INVALID (-1)
+
+
/* MEM-AP register addresses */
#define MEM_AP_REG_CSW 0x00
#define MEM_AP_REG_TAR 0x04
@@ -150,14 +159,6 @@
#define IDR_JEP106_ARM 0x04760000
-#define DP_SELECT_APSEL 0xFF000000
-#define DP_SELECT_APBANK 0x000000F0
-#define DP_SELECT_DPBANK 0x0000000F
-#define DP_SELECT_INVALID 0x00FFFF00 /* Reserved bits one */
-
-#define DP_APSEL_MAX (255)
-#define DP_APSEL_INVALID (-1)
-
/* FIXME: not SWD specific; should be renamed, e.g. adiv5_special_seq */
enum swd_special_seq {
LINE_RESET,