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| author | Oleksij Rempel <bug-track@fisher-privat.net> | 2013-04-18 11:47:22 +0200 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2013-07-17 14:33:09 +0000 |
| commit | 45f0553f30e8145420b3656ca16b18c83dbf90d1 (patch) | |
| tree | 0df2ff179efec0db3d257646bbf21588b31ebb6b /src/target | |
| parent | f12ec221ab1d106d1a8927f338c5f8d847b2f7c1 (diff) | |
| download | riscv-openocd-45f0553f30e8145420b3656ca16b18c83dbf90d1.zip riscv-openocd-45f0553f30e8145420b3656ca16b18c83dbf90d1.tar.gz riscv-openocd-45f0553f30e8145420b3656ca16b18c83dbf90d1.tar.bz2 | |
mips32_dmaacc: add new funct ejtag_dma_dstrt_poll
Change-Id: I8472a85032e397445408dce917f60c8e6ce852e2
Signed-off-by: Oleksij Rempel <bug-track@fisher-privat.net>
Reviewed-on: http://openocd.zylin.com/1343
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/mips32_dmaacc.c | 39 |
1 files changed, 15 insertions, 24 deletions
diff --git a/src/target/mips32_dmaacc.c b/src/target/mips32_dmaacc.c index 308507b..733f96c 100644 --- a/src/target/mips32_dmaacc.c +++ b/src/target/mips32_dmaacc.c @@ -53,6 +53,15 @@ static int mips32_dmaacc_write_mem32(struct mips_ejtag *ejtag_info, * displaying/modifying memory and memory mapped registers. */ +static void ejtag_dma_dstrt_poll(struct mips_ejtag *ejtag_info) +{ + uint32_t ejtag_ctrl; + do { + ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl; + mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); + } while (ejtag_ctrl & EJTAG_CTRL_DSTRT); +} + static int ejtag_dma_read(struct mips_ejtag *ejtag_info, uint32_t addr, uint32_t *data) { uint32_t v; @@ -72,10 +81,7 @@ begin_ejtag_dma_read: mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); /* Wait for DSTRT to Clear */ - do { - ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl; - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } while (ejtag_ctrl & EJTAG_CTRL_DSTRT); + ejtag_dma_dstrt_poll(ejtag_info); /* Read Data */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); @@ -117,10 +123,7 @@ begin_ejtag_dma_read_h: mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); /* Wait for DSTRT to Clear */ - do { - ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl; - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } while (ejtag_ctrl & EJTAG_CTRL_DSTRT); + ejtag_dma_dstrt_poll(ejtag_info); /* Read Data */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); @@ -167,10 +170,7 @@ begin_ejtag_dma_read_b: mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); /* Wait for DSTRT to Clear */ - do { - ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl; - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } while (ejtag_ctrl & EJTAG_CTRL_DSTRT); + ejtag_dma_dstrt_poll(ejtag_info); /* Read Data */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_DATA); @@ -232,10 +232,7 @@ begin_ejtag_dma_write: mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); /* Wait for DSTRT to Clear */ - do { - ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl; - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } while (ejtag_ctrl & EJTAG_CTRL_DSTRT); + ejtag_dma_dstrt_poll(ejtag_info); /* Clear DMA & Check DERR */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); @@ -281,10 +278,7 @@ begin_ejtag_dma_write_h: mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); /* Wait for DSTRT to Clear */ - do { - ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl; - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } while (ejtag_ctrl & EJTAG_CTRL_DSTRT); + ejtag_dma_dstrt_poll(ejtag_info); /* Clear DMA & Check DERR */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); @@ -331,10 +325,7 @@ begin_ejtag_dma_write_b: mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); /* Wait for DSTRT to Clear */ - do { - ejtag_ctrl = EJTAG_CTRL_DMAACC | ejtag_info->ejtag_ctrl; - mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl); - } while (ejtag_ctrl & EJTAG_CTRL_DSTRT); + ejtag_dma_dstrt_poll(ejtag_info); /* Clear DMA & Check DERR */ mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL); |