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| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2016-09-16 13:46:08 +0200 |
|---|---|---|
| committer | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2017-02-10 14:01:39 +0100 |
| commit | 4246fac240eb28e5a28112b71fc0b5f911e6c922 (patch) | |
| tree | 140130da1def7785b88c7cb15cba2140e8627e84 /src/target | |
| parent | df7069af556bd9601ec293a87e8465fb713b3a06 (diff) | |
| download | riscv-openocd-4246fac240eb28e5a28112b71fc0b5f911e6c922.zip riscv-openocd-4246fac240eb28e5a28112b71fc0b5f911e6c922.tar.gz riscv-openocd-4246fac240eb28e5a28112b71fc0b5f911e6c922.tar.bz2 | |
aarch64: use correct instruction for software breakpoints
External debuggers need to use HLT, not BRK. HLT generates a halting
debug event while BRK generates a debug exception for self-hosted
debugging.
Change-Id: I24024b83668107f73a14cc75d951134917269e5c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/aarch64.c | 2 | ||||
| -rw-r--r-- | src/target/armv8_dpm.c | 4 | ||||
| -rw-r--r-- | src/target/armv8_opcodes.h | 3 |
3 files changed, 6 insertions, 3 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c index b1534e3..d38e042 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -1369,7 +1369,7 @@ static int aarch64_set_breakpoint(struct target *target, } else if (breakpoint->type == BKPT_SOFT) { uint8_t code[4]; - buf_set_u32(code, 0, 32, ARMV8_BKPT(0x11)); + buf_set_u32(code, 0, 32, ARMV8_HLT(0x11)); retval = target_read_memory(target, breakpoint->address & 0xFFFFFFFFFFFFFFFE, breakpoint->length, 1, diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index 08b1a20..8c0d45a 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -869,7 +869,6 @@ void armv8_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr) /* Examine debug reason */ switch (DSCR_ENTRY(dscr)) { /* FALL THROUGH -- assume a v6 core in abort mode */ - case DSCRV8_ENTRY_HLT: /* HALT request from debugger */ case DSCRV8_ENTRY_EXT_DEBUG: /* EDBGRQ */ target->debug_reason = DBG_REASON_DBGRQ; break; @@ -878,7 +877,8 @@ void armv8_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr) case DSCRV8_ENTRY_HALT_STEP: target->debug_reason = DBG_REASON_SINGLESTEP; break; - case DSCRV8_ENTRY_BKPT: /* SW BKPT */ + case DSCRV8_ENTRY_HLT: /* HLT instruction (software breakpoint) */ + case DSCRV8_ENTRY_BKPT: /* SW BKPT (?) */ case DSCRV8_ENTRY_RESET_CATCH: /* Reset catch */ case DSCRV8_ENTRY_OS_UNLOCK: /*OS unlock catch*/ case DSCRV8_ENTRY_EXCEPTION_CATCH: /*exception catch*/ diff --git a/src/target/armv8_opcodes.h b/src/target/armv8_opcodes.h index 4f696db..a1fb5d4 100644 --- a/src/target/armv8_opcodes.h +++ b/src/target/armv8_opcodes.h @@ -116,7 +116,10 @@ /* ARM V8 Move immediate to process state field. */ #define ARMV8_MSR_IM(Op1, CRm, Op2) \ (0xd500401f | ((Op1) << 16) | ((CRm) << 8) | ((Op2) << 5)) + #define ARMV8_BKPT(Im) (0xD4200000 | ((Im & 0xffff) << 5)) +#define ARMV8_HLT(Im) (0x0D4400000 | ((Im & 0xffff) << 5)) + #define ARMV8_MOVFSP_64(Rt) ((1 << 31) | 0x11000000 | (0x1f << 5) | (Rt)) #define ARMV8_MOVTSP_64(Rt) ((1 << 31) | 0x11000000 | (Rt << 5) | (0x1F)) #define ARMV8_MOVFSP_32(Rt) (0x11000000 | (0x1f << 5) | (Rt)) |