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| author | Andreas Färber <afaerber@suse.de> | 2016-05-14 15:02:44 +0200 |
|---|---|---|
| committer | Freddie Chopin <freddie.chopin@gmail.com> | 2016-05-17 22:39:27 +0100 |
| commit | 21e6357010fe2a7aa2c189e6c75c1f862130408e (patch) | |
| tree | 7cf6aa35e70cb3e8a4aca3cbd54eb56924ae9913 /src/target | |
| parent | 2b2f67118aee6112098194d4086e023c5d549b49 (diff) | |
| download | riscv-openocd-21e6357010fe2a7aa2c189e6c75c1f862130408e.zip riscv-openocd-21e6357010fe2a7aa2c189e6c75c1f862130408e.tar.gz riscv-openocd-21e6357010fe2a7aa2c189e6c75c1f862130408e.tar.bz2 | |
arm_adi_v5: Add part numbers for Infineon XMC4000 family
This was found on multiple XMC4500:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11db
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1db, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
On multiple XMC4700 and an XMC4800 this was found instead:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11df
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1df, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
Name them "XMC4500 ROM" and "XMC4700/4800 ROM" respectively.
Change-Id: If369a6d16524004ba439b878f090a313a9f3a760
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3482
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/arm_adi_v5.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index fc680c9..b3249db 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -1040,6 +1040,8 @@ static const struct { { ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", }, { ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", }, { 0x09f, 0xcd0, "Atmel CPU with DSU", "(CPU)" }, + { 0x0c1, 0x1db, "XMC4500 ROM", "(ROM Table)" }, + { 0x0c1, 0x1df, "XMC4700/4800 ROM", "(ROM Table)" }, { 0x0c1, 0x1ed, "XMC1000 ROM", "(ROM Table)" }, { 0x0E5, 0x000, "SHARC+/Blackfin+", "", }, { 0x0F0, 0x440, "Qualcomm QDSS Component v1", "(Qualcomm Designed CoreSight Component v1)", }, |