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author | Antonio Borneo <borneo.antonio@gmail.com> | 2010-06-20 12:20:01 +0800 |
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committer | Antonio Borneo <borneo.antonio@gmail.com> | 2010-06-21 22:14:15 +0800 |
commit | d26b5236bac524ca33799f2c10f40f65755bdd08 (patch) | |
tree | c80d8542a55511533c7d709f223fb7de60c5b4c6 /src/target | |
parent | 3f59fcf77e5eb1d8c504a337b05bb1a5797e656f (diff) | |
download | riscv-openocd-d26b5236bac524ca33799f2c10f40f65755bdd08.zip riscv-openocd-d26b5236bac524ca33799f2c10f40f65755bdd08.tar.gz riscv-openocd-d26b5236bac524ca33799f2c10f40f65755bdd08.tar.bz2 |
target/feroceon: review scope of symbols
Add "static" qualifier to private functions.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/feroceon.c | 55 |
1 files changed, 32 insertions, 23 deletions
diff --git a/src/target/feroceon.c b/src/target/feroceon.c index efd3040..ea22ca0 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -59,7 +59,7 @@ #include "arm_opcodes.h" -int feroceon_assert_reset(struct target *target) +static int feroceon_assert_reset(struct target *target) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -72,7 +72,7 @@ int feroceon_assert_reset(struct target *target) return arm7_9_assert_reset(target); } -int feroceon_dummy_clock_out(struct arm_jtag *jtag_info, uint32_t instr) +static int feroceon_dummy_clock_out(struct arm_jtag *jtag_info, uint32_t instr) { struct scan_field fields[3]; uint8_t out_buf[4]; @@ -107,7 +107,8 @@ int feroceon_dummy_clock_out(struct arm_jtag *jtag_info, uint32_t instr) return ERROR_OK; } -void feroceon_change_to_arm(struct target *target, uint32_t *r0, uint32_t *pc) +static void feroceon_change_to_arm(struct target *target, uint32_t *r0, + uint32_t *pc) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -153,7 +154,8 @@ void feroceon_change_to_arm(struct target *target, uint32_t *r0, uint32_t *pc) *pc -= (12 + 4); } -void feroceon_read_core_regs(struct target *target, uint32_t mask, uint32_t* core_regs[16]) +static void feroceon_read_core_regs(struct target *target, + uint32_t mask, uint32_t* core_regs[16]) { int i; struct arm *armv4_5 = target->arch_info; @@ -172,7 +174,8 @@ void feroceon_read_core_regs(struct target *target, uint32_t mask, uint32_t* cor arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_read_core_regs_target_buffer(struct target *target, uint32_t mask, void* buffer, int size) +static void feroceon_read_core_regs_target_buffer(struct target *target, + uint32_t mask, void* buffer, int size) { int i; struct arm *armv4_5 = target->arch_info; @@ -209,7 +212,7 @@ void feroceon_read_core_regs_target_buffer(struct target *target, uint32_t mask, arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_read_xpsr(struct target *target, uint32_t *xpsr, int spsr) +static void feroceon_read_xpsr(struct target *target, uint32_t *xpsr, int spsr) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -232,7 +235,7 @@ void feroceon_read_xpsr(struct target *target, uint32_t *xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_write_xpsr(struct target *target, uint32_t xpsr, int spsr) +static void feroceon_write_xpsr(struct target *target, uint32_t xpsr, int spsr) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -273,7 +276,8 @@ void feroceon_write_xpsr(struct target *target, uint32_t xpsr, int spsr) arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_write_xpsr_im8(struct target *target, uint8_t xpsr_im, int rot, int spsr) +static void feroceon_write_xpsr_im8(struct target *target, + uint8_t xpsr_im, int rot, int spsr) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -290,7 +294,8 @@ void feroceon_write_xpsr_im8(struct target *target, uint8_t xpsr_im, int rot, in arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_write_core_regs(struct target *target, uint32_t mask, uint32_t core_regs[16]) +static void feroceon_write_core_regs(struct target *target, + uint32_t mask, uint32_t core_regs[16]) { int i; struct arm *armv4_5 = target->arch_info; @@ -310,7 +315,7 @@ void feroceon_write_core_regs(struct target *target, uint32_t mask, uint32_t cor arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); } -void feroceon_branch_resume(struct target *target) +static void feroceon_branch_resume(struct target *target) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -325,7 +330,7 @@ void feroceon_branch_resume(struct target *target) arm7_9->need_bypass_before_restart = 1; } -void feroceon_branch_resume_thumb(struct target *target) +static void feroceon_branch_resume_thumb(struct target *target) { LOG_DEBUG("-"); @@ -360,7 +365,8 @@ void feroceon_branch_resume_thumb(struct target *target) arm7_9->need_bypass_before_restart = 1; } -int feroceon_read_cp15(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) +static int feroceon_read_cp15(struct target *target, uint32_t op1, + uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -382,7 +388,8 @@ int feroceon_read_cp15(struct target *target, uint32_t op1, uint32_t op2, uint32 return jtag_execute_queue(); } -int feroceon_write_cp15(struct target *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) +static int feroceon_write_cp15(struct target *target, uint32_t op1, + uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -401,7 +408,7 @@ int feroceon_write_cp15(struct target *target, uint32_t op1, uint32_t op2, uint3 return arm7_9_execute_sys_speed(target); } -void feroceon_set_dbgrq(struct target *target) +static void feroceon_set_dbgrq(struct target *target) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -411,7 +418,7 @@ void feroceon_set_dbgrq(struct target *target) embeddedice_store_reg(dbg_ctrl); } -void feroceon_enable_single_step(struct target *target, uint32_t next_pc) +static void feroceon_enable_single_step(struct target *target, uint32_t next_pc) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -424,7 +431,7 @@ void feroceon_enable_single_step(struct target *target, uint32_t next_pc) embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], 0xf7); } -void feroceon_disable_single_step(struct target *target) +static void feroceon_disable_single_step(struct target *target) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -436,7 +443,7 @@ void feroceon_disable_single_step(struct target *target) embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE]); } -int feroceon_examine_debug_reason(struct target *target) +static int feroceon_examine_debug_reason(struct target *target) { /* the MOE is not implemented */ if (target->debug_reason != DBG_REASON_SINGLESTEP) @@ -447,7 +454,8 @@ int feroceon_examine_debug_reason(struct target *target) return ERROR_OK; } -int feroceon_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer) +static int feroceon_bulk_write_memory(struct target *target, + uint32_t address, uint32_t count, uint8_t *buffer) { int retval; struct arm *armv4_5 = target->arch_info; @@ -576,13 +584,14 @@ int feroceon_bulk_write_memory(struct target *target, uint32_t address, uint32_t return retval; } -int feroceon_init_target(struct command_context *cmd_ctx, struct target *target) +static int feroceon_init_target(struct command_context *cmd_ctx, + struct target *target) { arm9tdmi_init_target(cmd_ctx, target); return ERROR_OK; } -void feroceon_common_setup(struct target *target) +static void feroceon_common_setup(struct target *target) { struct arm *armv4_5 = target->arch_info; struct arm7_9_common *arm7_9 = armv4_5->arch_info; @@ -615,7 +624,7 @@ void feroceon_common_setup(struct target *target) arm7_9->wp1_used_default = -1; } -int feroceon_target_create(struct target *target, Jim_Interp *interp) +static int feroceon_target_create(struct target *target, Jim_Interp *interp) { struct arm926ejs_common *arm926ejs = calloc(1,sizeof(struct arm926ejs_common)); @@ -629,7 +638,7 @@ int feroceon_target_create(struct target *target, Jim_Interp *interp) return ERROR_OK; } -int dragonite_target_create(struct target *target, Jim_Interp *interp) +static int dragonite_target_create(struct target *target, Jim_Interp *interp) { struct arm966e_common *arm966e = calloc(1,sizeof(struct arm966e_common)); @@ -639,7 +648,7 @@ int dragonite_target_create(struct target *target, Jim_Interp *interp) return ERROR_OK; } -int feroceon_examine(struct target *target) +static int feroceon_examine(struct target *target) { struct arm *armv4_5; struct arm7_9_common *arm7_9; |