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| author | Paul Fertser <fercerpav@gmail.com> | 2012-04-01 15:18:02 +0200 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2015-03-09 06:36:30 +0000 |
| commit | dccbf7d88d05a1f7a22f164ef149777718a399ed (patch) | |
| tree | 068e6b4dac9417477fdcab1dd3c24e4f48bf19d2 /src/target/xscale.c | |
| parent | ecf97f7c9689dfc207ca639bb6b6f14a173f3d1f (diff) | |
| download | riscv-openocd-dccbf7d88d05a1f7a22f164ef149777718a399ed.zip riscv-openocd-dccbf7d88d05a1f7a22f164ef149777718a399ed.tar.gz riscv-openocd-dccbf7d88d05a1f7a22f164ef149777718a399ed.tar.bz2 | |
armv7m: add FPU registers support
This patch adds the fpv4-sp-d16 registers to the armv7m register set.
The work is inspired by Mathias K but takes a different approach:
instead of having both double and single presicion registers in the
cache this patch works only with the doubles and counts on GDB to
split the data in halves whenever needed.
Tested with HLA only (on an STM32F334 disco board).
Currently this patch makes all ARMv7-M targets report an FPU-enabled
target description to GDB. It shouldn't harm if the user is not trying
to access non-existing FPU. However, the plan is to make this depend
on actual FPU presence later.
Change-Id: Ifcc72c80ef745230c42e4dc3995f792753fc4e7a
Signed-off-by: Mathias K <kesmtp@freenet.de>
[fercerpav@gmail.com: rework to fit target description framework]
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/514
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'src/target/xscale.c')
| -rw-r--r-- | src/target/xscale.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/xscale.c b/src/target/xscale.c index 898d080..82e4160 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -1621,7 +1621,7 @@ static int xscale_read_core_reg(struct target *target, struct reg *r, } static int xscale_write_core_reg(struct target *target, struct reg *r, - int num, enum arm_mode mode, uint32_t value) + int num, enum arm_mode mode, uint8_t *value) { /** \todo add debug handler support for core register writes */ LOG_ERROR("not implemented"); |