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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2020-02-07 12:52:14 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2020-03-10 20:18:47 +0000 |
| commit | 123e10288df62e6f66426cdab7adb93fd7348d5f (patch) | |
| tree | 06766fe421b25a6c34c54300ca6d12b0438546e5 /src/target/semihosting_common.c | |
| parent | b304971f380d89d5e934859b2c36e81c26df6eee (diff) | |
| download | riscv-openocd-123e10288df62e6f66426cdab7adb93fd7348d5f.zip riscv-openocd-123e10288df62e6f66426cdab7adb93fd7348d5f.tar.gz riscv-openocd-123e10288df62e6f66426cdab7adb93fd7348d5f.tar.bz2 | |
flash/stm32h7x: fix bank sizes for devices with trimmed flash
STM32H7yxxI: dual independent 1 MByte banks
STM32H7yxxG: dual independent 512 Kbyte banks
STM32H7yxxB: single 128 Kbyte bank
where y = [4/5] or [A/B]
references: (documents are available in www.st.com)
- STM32H7[4/5]x[G/I] : DS12110 Rev 7
>> 3.3.1 Embedded Flash memory
- STM32H750xB : RM0433 Rev 6
>> Table 11. Flash memory organization on STM32H750xB devices
- STM32H7[A/B]x[B/G/I] : RM0455 Rev 3
>> 4.3.4 Flash memory architecture and usage
Change-Id: Ic9346964ef2554abf47f5832e25adfdc77bd323e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5442
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Diffstat (limited to 'src/target/semihosting_common.c')
0 files changed, 0 insertions, 0 deletions