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author | Stefan Mahr <stefan.mahr@sphairon.com> | 2011-05-30 16:21:04 +0200 |
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committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-06-01 07:23:35 +0200 |
commit | 524d79ebe74e28d751c88e665aabac2ea4d04e5c (patch) | |
tree | 0c5622952df5a1e686c67968c935d6ef53b98b74 /src/target/mips32.c | |
parent | 4da551732eceee87085ec6b159bef6693c704835 (diff) | |
download | riscv-openocd-524d79ebe74e28d751c88e665aabac2ea4d04e5c.zip riscv-openocd-524d79ebe74e28d751c88e665aabac2ea4d04e5c.tar.gz riscv-openocd-524d79ebe74e28d751c88e665aabac2ea4d04e5c.tar.bz2 |
mips: fix some more endian madness
Diffstat (limited to 'src/target/mips32.c')
-rw-r--r-- | src/target/mips32.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/target/mips32.c b/src/target/mips32.c index 79215b5..4782067 100644 --- a/src/target/mips32.c +++ b/src/target/mips32.c @@ -559,6 +559,13 @@ int mips32_configure_break_unit(struct target *target) return retval; } + /* check if target endianness settings matches debug control register */ + if ( ( (dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_LITTLE_ENDIAN) ) || + ( !(dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_BIG_ENDIAN) ) ) + { + LOG_WARNING("DCR endianness settings does not match target settings"); + } + LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints, mips32->num_data_bpoints); |