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| author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2021-02-12 21:12:43 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-03-10 21:35:31 +0000 |
| commit | bc0c9907d6ba9a39a953482a2bb2195504999427 (patch) | |
| tree | 78ed8be3096ce4f8eacde957f6ffc13664718690 /src/target/hla_target.c | |
| parent | 5e57090203b36465c2f0560b92ca58cafb2c9e0b (diff) | |
| download | riscv-openocd-bc0c9907d6ba9a39a953482a2bb2195504999427.zip riscv-openocd-bc0c9907d6ba9a39a953482a2bb2195504999427.tar.gz riscv-openocd-bc0c9907d6ba9a39a953482a2bb2195504999427.tar.bz2 | |
cortex_m: avoid reading and writing non-existent registers
Change-Id: Iedc24352c8d3444372da06d00fcec9603540f950
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/6059
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target/hla_target.c')
| -rw-r--r-- | src/target/hla_target.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/hla_target.c b/src/target/hla_target.c index ca8b587..9ac3442 100644 --- a/src/target/hla_target.c +++ b/src/target/hla_target.c @@ -226,7 +226,7 @@ static int adapter_load_context(struct target *target) for (int i = 0; i < num_regs; i++) { struct reg *r = &armv7m->arm.core_cache->reg_list[i]; - if (!r->valid) + if (r->exist && !r->valid) armv7m->arm.read_core_reg(target, r, i, ARM_MODE_ANY); } |