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author | Tomas Vanek <vanekt@fbl.cz> | 2020-10-14 21:03:02 +0200 |
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committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-11-15 21:06:45 +0000 |
commit | 62394a6b1c25ac92630a4828ec1b5d70acfe6e0f (patch) | |
tree | 7b0dcfee66827171f8049e306814d61578b6e3a1 /src/target/hla_target.c | |
parent | d3a37b0e76ece5625db74b4f343ebcc90059657f (diff) | |
download | riscv-openocd-62394a6b1c25ac92630a4828ec1b5d70acfe6e0f.zip riscv-openocd-62394a6b1c25ac92630a4828ec1b5d70acfe6e0f.tar.gz riscv-openocd-62394a6b1c25ac92630a4828ec1b5d70acfe6e0f.tar.bz2 |
target/cortex_m,hla_target: rework Cortex-M register handling part 4
Consolidate low level register read/write.
Floating point registers were handled by target_read/write_u32
unlike other registers handled by cortexm_dap_read/write_coreregister_u32
There is no reason to do so in cortex_m.
Remove cortexm_dap_read/write_coreregister_u32
and use cortex_m_load/store_core_reg_u32 directly.
Similarly HLA adapters register read/write interface supports all registers
so use it for any floating point and other registers.
Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5864
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target/hla_target.c')
-rw-r--r-- | src/target/hla_target.c | 112 |
1 files changed, 2 insertions, 110 deletions
diff --git a/src/target/hla_target.c b/src/target/hla_target.c index 725c2d2..99afccc 100644 --- a/src/target/hla_target.c +++ b/src/target/hla_target.c @@ -53,123 +53,15 @@ static inline struct hl_interface_s *target_to_adapter(struct target *target) static int adapter_load_core_reg_u32(struct target *target, uint32_t regsel, uint32_t *value) { - int retval; struct hl_interface_s *adapter = target_to_adapter(target); - - LOG_DEBUG("%s", __func__); - - /* NOTE: we "know" here that the register identifiers used - * in the v7m header match the Cortex-M3 Debug Core Register - * Selector values for R0..R15, xPSR, MSP, and PSP. - */ - switch (regsel) { - case ARMV7M_REGSEL_R0 ... ARMV7M_REGSEL_PSP: - /* read a normal core register */ - retval = adapter->layout->api->read_reg(adapter->handle, regsel, value); - - if (retval != ERROR_OK) { - LOG_ERROR("JTAG failure %i", retval); - return ERROR_JTAG_DEVICE_ERROR; - } - LOG_DEBUG("load from core reg %" PRIu32 " value 0x%" PRIx32 "", regsel, *value); - break; - - case ARMV7M_REGSEL_FPSCR: - /* Floating-point Status and Registers */ - retval = target_write_u32(target, ARMV7M_SCS_DCRSR, regsel); - if (retval != ERROR_OK) - return retval; - retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value); - if (retval != ERROR_OK) - return retval; - LOG_DEBUG("load from FPSCR value 0x%" PRIx32, *value); - break; - - case ARMV7M_REGSEL_S0 ... ARMV7M_REGSEL_S31: - /* Floating-point Status and Registers */ - retval = target_write_u32(target, ARMV7M_SCS_DCRSR, regsel); - if (retval != ERROR_OK) - return retval; - retval = target_read_u32(target, ARMV7M_SCS_DCRDR, value); - if (retval != ERROR_OK) - return retval; - LOG_DEBUG("load from FPU reg S%d value 0x%" PRIx32, - (int)(regsel - ARMV7M_REGSEL_S0), *value); - break; - - case ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL: - retval = adapter->layout->api->read_reg(adapter->handle, ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL, value); - if (retval != ERROR_OK) - return retval; - - LOG_DEBUG("load from special reg PRIMASK/BASEPRI/FAULTMASK/CONTROL value 0x%" PRIx32, *value); - break; - - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - return ERROR_OK; + return adapter->layout->api->read_reg(adapter->handle, regsel, value); } static int adapter_store_core_reg_u32(struct target *target, uint32_t regsel, uint32_t value) { - int retval; - struct armv7m_common *armv7m = target_to_armv7m(target); struct hl_interface_s *adapter = target_to_adapter(target); - - LOG_DEBUG("%s", __func__); - - switch (regsel) { - case ARMV7M_REGSEL_R0 ... ARMV7M_REGSEL_PSP: - retval = adapter->layout->api->write_reg(adapter->handle, regsel, value); - - if (retval != ERROR_OK) { - struct reg *r; - - LOG_ERROR("JTAG failure"); - r = armv7m->arm.core_cache->reg_list + regsel; /* TODO: don't use regsel as register index */ - r->dirty = r->valid; - return ERROR_JTAG_DEVICE_ERROR; - } - LOG_DEBUG("write core reg %" PRIu32 " value 0x%" PRIx32 "", regsel, value); - break; - - case ARMV7M_REGSEL_FPSCR: - /* Floating-point Status and Registers */ - retval = target_write_u32(target, ARMV7M_SCS_DCRDR, value); - if (retval != ERROR_OK) - return retval; - retval = target_write_u32(target, ARMV7M_SCS_DCRSR, ARMV7M_REGSEL_FPSCR | DCRSR_WnR); - if (retval != ERROR_OK) - return retval; - LOG_DEBUG("write FPSCR value 0x%" PRIx32, value); - break; - - case ARMV7M_REGSEL_S0 ... ARMV7M_REGSEL_S31: - /* Floating-point Status and Registers */ - retval = target_write_u32(target, ARMV7M_SCS_DCRDR, value); - if (retval != ERROR_OK) - return retval; - retval = target_write_u32(target, ARMV7M_SCS_DCRSR, regsel | DCRSR_WnR); - if (retval != ERROR_OK) - return retval; - LOG_DEBUG("write FPU reg S%d value 0x%" PRIx32, - (int)(regsel - ARMV7M_REGSEL_S0), value); - break; - - case ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL: - adapter->layout->api->write_reg(adapter->handle, ARMV7M_REGSEL_PMSK_BPRI_FLTMSK_CTRL, value); - - LOG_DEBUG("write special reg PRIMASK/BASEPRI/FAULTMASK/CONTROL value 0x%" PRIx32, value); - break; - - default: - return ERROR_COMMAND_SYNTAX_ERROR; - } - - return ERROR_OK; + return adapter->layout->api->write_reg(adapter->handle, regsel, value); } static int adapter_examine_debug_reason(struct target *target) |