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| author | Tim Newsome <tim@sifive.com> | 2023-11-03 10:43:48 -0700 |
|---|---|---|
| committer | Tim Newsome <tim@sifive.com> | 2023-11-06 09:25:46 -0800 |
| commit | b5bd88441c3745e37f87c9940809f212f96c3547 (patch) | |
| tree | 45185424e522f840668faf88ebfab333e62065ac /src/target/espressif/esp32s3.c | |
| parent | b75bfab0261aa06597ee68895884a62eabceec18 (diff) | |
| parent | 05ee88915520d1dd82da94a016a9374a1f3a8129 (diff) | |
| download | riscv-openocd-b5bd88441c3745e37f87c9940809f212f96c3547.zip riscv-openocd-b5bd88441c3745e37f87c9940809f212f96c3547.tar.gz riscv-openocd-b5bd88441c3745e37f87c9940809f212f96c3547.tar.bz2 | |
Merge commit '05ee88915520d1dd82da94a016a9374a1f3a8129' into from_upstream
Conflicts:
src/jtag/drivers/xds110.c
src/target/riscv/riscv.c
src/target/riscv/riscv_semihosting.c
tcl/target/esp_common.cfg
Change-Id: If0c02817df03b7fd700cc84b4da2c02d36737d28
Diffstat (limited to 'src/target/espressif/esp32s3.c')
| -rw-r--r-- | src/target/espressif/esp32s3.c | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/src/target/espressif/esp32s3.c b/src/target/espressif/esp32s3.c index 4855678..5036956 100644 --- a/src/target/espressif/esp32s3.c +++ b/src/target/espressif/esp32s3.c @@ -24,16 +24,6 @@ implementation. */ /* ESP32_S3 memory map */ -#define ESP32_S3_IRAM_LOW 0x40370000 -#define ESP32_S3_IRAM_HIGH 0x403E0000 -#define ESP32_S3_IROM_MASK_LOW 0x40000000 -#define ESP32_S3_IROM_MASK_HIGH 0x40060000 -#define ESP32_S3_DRAM_LOW 0x3FC88000 -#define ESP32_S3_DRAM_HIGH 0x3FD00000 -#define ESP32_S3_RTC_IRAM_LOW 0x600FE000 -#define ESP32_S3_RTC_IRAM_HIGH 0x60100000 -#define ESP32_S3_RTC_DRAM_LOW 0x600FE000 -#define ESP32_S3_RTC_DRAM_HIGH 0x60100000 #define ESP32_S3_RTC_DATA_LOW 0x50000000 #define ESP32_S3_RTC_DATA_HIGH 0x50002000 #define ESP32_S3_EXTRAM_DATA_LOW 0x3D000000 @@ -283,7 +273,10 @@ static int esp32s3_disable_wdts(struct target *target) static int esp32s3_on_halt(struct target *target) { - return esp32s3_disable_wdts(target); + int ret = esp32s3_disable_wdts(target); + if (ret == ERROR_OK) + ret = esp_xtensa_smp_on_halt(target); + return ret; } static int esp32s3_arch_state(struct target *target) |