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| author | Tomas Vanek <vanekt@fbl.cz> | 2019-03-01 21:44:27 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2020-12-02 23:15:16 +0000 |
| commit | d459a2d27df52643dc8932827a63467a14f7c162 (patch) | |
| tree | 6ce5a59a86c700ffefe6bb115549d7fa42abd0da /src/target/cortex_m.c | |
| parent | 646c3c99020f8fdf7ee0adf821582238aac4a80c (diff) | |
| download | riscv-openocd-d459a2d27df52643dc8932827a63467a14f7c162.zip riscv-openocd-d459a2d27df52643dc8932827a63467a14f7c162.tar.gz riscv-openocd-d459a2d27df52643dc8932827a63467a14f7c162.tar.bz2 | |
adi_v5_swd: wait for readable DPIDR, ABORT if stalled
Reading of DPIDR is the very first operation after JTAG to SWD sequence.
Without this change if DPIDR read fails then swd connect fails.
Keep trying JTAG to SWD sequence and DPIDR read until success
or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport
mostly unnecessary.
Also test for ERROR_WAIT (which should not occur according to
IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled
then issue abort to make the next connect possible.
Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5730
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'src/target/cortex_m.c')
0 files changed, 0 insertions, 0 deletions