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| author | Patrick Stewart <patstew@gmail.com> | 2015-09-28 13:51:58 +0100 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2015-12-29 12:35:50 +0000 |
| commit | bf4cf766310768198cfa766467d47bdb180f9b27 (patch) | |
| tree | 21f27635302092f1fa27605bc0544a54463bcf85 /src/target/cortex_m.c | |
| parent | 67f24e67347329cb3cd2f72aa84308e0b978cdc5 (diff) | |
| download | riscv-openocd-bf4cf766310768198cfa766467d47bdb180f9b27.zip riscv-openocd-bf4cf766310768198cfa766467d47bdb180f9b27.tar.gz riscv-openocd-bf4cf766310768198cfa766467d47bdb180f9b27.tar.bz2 | |
arm_debug: Support multiple APs per DAP and remove DAP from armv7* structs
Separate out the values from adiv5_dap that are associated with a specific AP into a new struct, so we can properly support multiple APs. Remove the DAP struct from the armv7* structs, because we can have multiple CPUs per DAP, and we shouldn't have multiple DAP structs. Tidy up a few places where ap_current is used incorrectly.
Change-Id: I0c6ef4b49cc86b140366347aaf9b76c07cbab0a8
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Reviewed-on: http://openocd.zylin.com/2984
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'src/target/cortex_m.c')
| -rw-r--r-- | src/target/cortex_m.c | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index b821bde..f8a5132 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1903,6 +1903,9 @@ int cortex_m_examine(struct target *target) struct adiv5_dap *swjdp = cortex_m->armv7m.arm.dap; struct armv7m_common *armv7m = target_to_armv7m(target); + /* Leave (only) generic DAP stuff for debugport_init(); */ + swjdp->ap[armv7m->debug_ap].memaccess_tck = 8; + /* stlink shares the examine handler but does not support * all its calls */ if (!armv7m->stlink) { @@ -1957,7 +1960,7 @@ int cortex_m_examine(struct target *target) if (i == 4 || i == 3) { /* Cortex-M3/M4 has 4096 bytes autoincrement range */ - armv7m->dap.tar_autoincr_block = (1 << 12); + swjdp->ap[armv7m->debug_ap].tar_autoincr_block = (1 << 12); } /* Configure trace modules */ @@ -2106,24 +2109,26 @@ static int cortex_m_init_arch_info(struct target *target, armv7m_init_arch_info(target, armv7m); - /* prepare JTAG information for the new target */ - cortex_m->jtag_info.tap = tap; - cortex_m->jtag_info.scann_size = 4; + /* tap has no dap initialized */ + if (!tap->dap) { + tap->dap = dap_init(); + + /* prepare JTAG information for the new target */ + cortex_m->jtag_info.tap = tap; + cortex_m->jtag_info.scann_size = 4; + + /* Leave (only) generic DAP stuff for debugport_init() */ + tap->dap->jtag_info = &cortex_m->jtag_info; + } /* default reset mode is to use srst if fitted * if not it will use CORTEX_M3_RESET_VECTRESET */ cortex_m->soft_reset_config = CORTEX_M_RESET_VECTRESET; - armv7m->arm.dap = &armv7m->dap; + armv7m->arm.dap = tap->dap; /* Leave (only) generic DAP stuff for debugport_init(); */ - armv7m->dap.jtag_info = &cortex_m->jtag_info; - armv7m->dap.memaccess_tck = 8; - - /* Cortex-M3/M4 has 4096 bytes autoincrement range - * but set a safe default to 1024 to support Cortex-M0 - * this will be changed in cortex_m3_examine if a M3/M4 is detected */ - armv7m->dap.tar_autoincr_block = (1 << 10); + tap->dap->ap[dap_ap_get_select(tap->dap)].memaccess_tck = 8; /* register arch-specific functions */ armv7m->examine_debug_reason = cortex_m_examine_debug_reason; |