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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2019-03-03 00:22:37 +0100 |
|---|---|---|
| committer | Tomas Vanek <vanekt@fbl.cz> | 2019-06-20 19:51:01 +0100 |
| commit | 6ea43726a801baa718fd08dcdb8ae5835b8a2385 (patch) | |
| tree | 096b0e70fc1276aaaee485489734390dca262ebc /src/target/cortex_m.c | |
| parent | a521d93b7a2763a9dcc50e8cae0f037a24f4bfa1 (diff) | |
| download | riscv-openocd-6ea43726a801baa718fd08dcdb8ae5835b8a2385.zip riscv-openocd-6ea43726a801baa718fd08dcdb8ae5835b8a2385.tar.gz riscv-openocd-6ea43726a801baa718fd08dcdb8ae5835b8a2385.tar.bz2 | |
cortex_m: set C_DEBUGEN in soft_reset_halt
The command "soft_reset_halt" is deprecated since mid 2013 with
the commit 146dfe32956d ("cortex_m: deprecate soft_reset_halt").
Nevertheless it is still extremely useful with multicore chips
where it allows to reset only one of the cores, option not
available through asserting the chip-wide srst.
Without a better replacement of the command, it's worth fixing it.
Accordingly to ARM DDI 0403E.d, chapter C1.4.1 "Entering Debug
state on leaving reset state", to halt the core at reset both bits
DHCSR.C_DEBUGEN and DEMCR.VC_CORERESET must be set.
Current code only sets the latter bit, relying on having C_DEBUGEN
already set through other commands, e.g. "halt". This prevents the
command "soft_reset_halt" to work if issued as very first command.
Set the bit C_DEBUGEN in command "soft_reset_halt".
Change-Id: I66bfd6a0da1fca5049dea037b4d258cf6f842966
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4987
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src/target/cortex_m.c')
| -rw-r--r-- | src/target/cortex_m.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index 63603da..7f59401 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -716,6 +716,11 @@ static int cortex_m_soft_reset_halt(struct target *target) * core, not the peripherals */ LOG_WARNING("soft_reset_halt is deprecated, please use 'reset halt' instead."); + /* Set C_DEBUGEN */ + retval = cortex_m_write_debug_halt_mask(target, 0, C_STEP | C_MASKINTS); + if (retval != ERROR_OK) + return retval; + /* Enter debug state on reset; restore DEMCR in endreset_event() */ retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DEMCR, TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET); |