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| author | Tarek BOCHKATI <tarek.bouchkati@st.com> | 2021-01-12 11:57:18 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-01-18 15:32:03 +0000 |
| commit | 2dc9c1df81b6458875233fc3710ab9d3e871743d (patch) | |
| tree | 5c5cd48820688af4d21e5b4571041344e8c0ab6a /src/target/cortex_m.c | |
| parent | 404993b29f1304fb53202fb88147298465bfb525 (diff) | |
| download | riscv-openocd-2dc9c1df81b6458875233fc3710ab9d3e871743d.zip riscv-openocd-2dc9c1df81b6458875233fc3710ab9d3e871743d.tar.gz riscv-openocd-2dc9c1df81b6458875233fc3710ab9d3e871743d.tar.bz2 | |
cortex_m: [FIX] ARMv8-M does not support VECTRESET
ref: Arm®v8-M Architecture Reference Manual (DDI0553B.m)
D1.2.3: AIRCR, Application Interrupt and Reset Control Register
Bit [0] is RES0
Change-Id: I6ef451b2c114487e2732852a60e86c292ffa6a50
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: http://openocd.zylin.com/6014
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target/cortex_m.c')
| -rw-r--r-- | src/target/cortex_m.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index ac308b4..ce2c426 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -2011,8 +2011,8 @@ int cortex_m_examine(struct target *target) } LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid); - /* VECTRESET is not supported on Cortex-M0, M0+ and M1 */ - cortex_m->vectreset_supported = i > 1; + /* VECTRESET is supported only on ARMv7-M cores */ + cortex_m->vectreset_supported = !armv7m->arm.is_armv8m && !armv7m->arm.is_armv6m; if (i == 4) { target_read_u32(target, MVFR0, &mvfr0); |