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author | mlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-13 17:26:07 +0000 |
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committer | mlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-13 17:26:07 +0000 |
commit | d4607c1f7c51806f10a9e74a21de724ce7ccc9bf (patch) | |
tree | 58e90c7730eab812ed8e4289737542857cfa133c /src/target/cortex_a8.h | |
parent | c4ee12ea7724d06d2f6818379fe271c92f0bbc18 (diff) | |
download | riscv-openocd-d4607c1f7c51806f10a9e74a21de724ce7ccc9bf.zip riscv-openocd-d4607c1f7c51806f10a9e74a21de724ce7ccc9bf.tar.gz riscv-openocd-d4607c1f7c51806f10a9e74a21de724ce7ccc9bf.tar.bz2 |
More CortexA8 debug register definitions.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2702 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/cortex_a8.h')
-rw-r--r-- | src/target/cortex_a8.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/target/cortex_a8.h b/src/target/cortex_a8.h index a1efe66..358f71b 100644 --- a/src/target/cortex_a8.h +++ b/src/target/cortex_a8.h @@ -43,6 +43,7 @@ extern char* cortex_a8_state_strings[]; #define CPUDBG_DIDR 0x000 #define CPUDBG_WFAR 0x018 #define CPUDBG_VCR 0x01C +#define CPUDBG_ECR 0x024 #define CPUDBG_DSCCR 0x028 #define CPUDBG_DTRRX 0x080 #define CPUDBG_ITR 0x084 @@ -63,6 +64,9 @@ extern char* cortex_a8_state_strings[]; #define CPUDBG_CPUID 0xD00 #define CPUDBG_CTYPR 0xD04 #define CPUDBG_TTYPR 0xD0C +#define CPUDBG_LOCKACCESS 0xFB0 +#define CPUDBG_LOCKSTATUS 0xFB4 +#define CPUDBG_AUTHSTATUS 0xFB8 #define BRP_NORMAL 0 #define BRP_CONTEXT 1 |