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authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>2016-10-26 17:32:43 +0200
committerPaul Fertser <fercerpav@gmail.com>2017-02-24 09:11:52 +0000
commit5d00fd9d1dc504335dd71e474a3d61dec7696c40 (patch)
treecd5f3092f02a8599de8bbd3d7265e4f939f0a5f6 /src/target/armv8_dpm.c
parent7c85165bc1a606883faa9bec51ebefbc652301f4 (diff)
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aarch64: fix software breakpoints when in aarch32 state
Use the correct opcode for Aarch32 state, both for the breakpoint instruction itself and the cache handling functions. Change-Id: I975fa67b1e577b54f5c672a01d516419c6a614b2 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/3981 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'src/target/armv8_dpm.c')
-rw-r--r--src/target/armv8_dpm.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index b4c14c2..b06e456 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -336,6 +336,9 @@ static int dpmv8_instr_write_data_r0_64(struct arm_dpm *dpm,
struct armv8_common *armv8 = dpm->arm->arch_info;
int retval;
+ if (dpm->arm->core_state != ARM_STATE_AARCH64)
+ return dpmv8_instr_write_data_r0(dpm, opcode, data);
+
/* transfer data from DCC to R0 */
retval = dpmv8_write_dcc_64(armv8, data);
if (retval == ERROR_OK)
@@ -413,6 +416,14 @@ static int dpmv8_instr_read_data_r0_64(struct arm_dpm *dpm,
struct armv8_common *armv8 = dpm->arm->arch_info;
int retval;
+ if (dpm->arm->core_state != ARM_STATE_AARCH64) {
+ uint32_t tmp;
+ retval = dpmv8_instr_read_data_r0(dpm, opcode, &tmp);
+ if (retval == ERROR_OK)
+ *data = tmp;
+ return retval;
+ }
+
/* the opcode, writing data to R0 */
retval = dpmv8_exec_opcode(dpm, opcode, &dpm->dscr);
if (retval != ERROR_OK)