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author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2018-04-18 10:06:29 +0200 |
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committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-01-30 09:01:59 +0000 |
commit | bda2d7371874569cd5232580a3602dd56083a304 (patch) | |
tree | 50e4eaea8af95bd41d7ce4c28b4589cca2c9c276 /src/target/armv8.c | |
parent | 7345801b69d2511252d587159bb9758532797233 (diff) | |
download | riscv-openocd-bda2d7371874569cd5232580a3602dd56083a304.zip riscv-openocd-bda2d7371874569cd5232580a3602dd56083a304.tar.gz riscv-openocd-bda2d7371874569cd5232580a3602dd56083a304.tar.bz2 |
aarch64: support for aarch32 ARM_MODE_SYS
Treat ARM_MODE_SYS like all other Aarch32 processor modes,
except for the special case of missing SPSR.
Change-Id: I60b21703659b264f552884cdc0f85fd45f7836de
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4494
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target/armv8.c')
-rw-r--r-- | src/target/armv8.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/target/armv8.c b/src/target/armv8.c index 1981e7c..cee837f 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -74,6 +74,10 @@ static const struct { .psr = ARM_MODE_ABT, }, { + .name = "SYS", + .psr = ARM_MODE_SYS, + }, + { .name = "EL0T", .psr = ARMV8_64_EL0T, }, |