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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2021-09-22 19:09:29 +0200 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-10-25 16:09:26 +0000 |
| commit | 01de751025cfaebb7c1090f1d1ff00071ce39c71 (patch) | |
| tree | 380efe69bda66438cf21050dd751ff408c3b8277 /src/target/armv8.c | |
| parent | 48d74f97114a76563753918da8708d45098fbf1d (diff) | |
| download | riscv-openocd-01de751025cfaebb7c1090f1d1ff00071ce39c71.zip riscv-openocd-01de751025cfaebb7c1090f1d1ff00071ce39c71.tar.gz riscv-openocd-01de751025cfaebb7c1090f1d1ff00071ce39c71.tar.bz2 | |
armv8: fix five dead assignments
Clang scan-build complains for five dead assignments:
Value stored to 'retval' is never read
Check the returned value and propagate the error.
Change-Id: I01172887a056d6f39ddcf2807848423970db1e89
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6590
Tested-by: jenkins
Diffstat (limited to 'src/target/armv8.c')
| -rw-r--r-- | src/target/armv8.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/src/target/armv8.c b/src/target/armv8.c index 749ea87..26116bb 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -454,29 +454,31 @@ static int armv8_read_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum, retval = dpm->instr_read_data_r0(dpm, ARMV4_5_VMOV(1, 1, 0, (num >> 4), (num & 0xf)), &value_r0); + if (retval != ERROR_OK) + return retval; /* read r1 via dcc */ retval = dpm->instr_read_data_dcc(dpm, ARMV4_5_MCR(14, 0, 1, 0, 5, 0), &value_r1); - if (retval == ERROR_OK) { - *lvalue = value_r1; - *lvalue = ((*lvalue) << 32) | value_r0; - } else + if (retval != ERROR_OK) return retval; + *lvalue = value_r1; + *lvalue = ((*lvalue) << 32) | value_r0; num++; /* repeat above steps for high 64 bits of V register */ retval = dpm->instr_read_data_r0(dpm, ARMV4_5_VMOV(1, 1, 0, (num >> 4), (num & 0xf)), &value_r0); + if (retval != ERROR_OK) + return retval; retval = dpm->instr_read_data_dcc(dpm, ARMV4_5_MCR(14, 0, 1, 0, 5, 0), &value_r1); - if (retval == ERROR_OK) { - *hvalue = value_r1; - *hvalue = ((*hvalue) << 32) | value_r0; - } else + if (retval != ERROR_OK) return retval; + *hvalue = value_r1; + *hvalue = ((*hvalue) << 32) | value_r0; break; default: retval = ERROR_FAIL; @@ -586,12 +588,16 @@ static int armv8_write_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum retval = dpm->instr_write_data_dcc(dpm, ARMV4_5_MRC(14, 0, 1, 0, 5, 0), value_r1); + if (retval != ERROR_OK) + return retval; /* write value_r0 to r0 via dcc then, * move to double word register from r0:r1: "vmov vm, r0, r1" */ retval = dpm->instr_write_data_r0(dpm, ARMV4_5_VMOV(0, 1, 0, (num >> 4), (num & 0xf)), value_r0); + if (retval != ERROR_OK) + return retval; num++; /* repeat above steps for high 64 bits of V register */ @@ -600,6 +606,8 @@ static int armv8_write_reg_simdfp_aarch32(struct armv8_common *armv8, int regnum retval = dpm->instr_write_data_dcc(dpm, ARMV4_5_MRC(14, 0, 1, 0, 5, 0), value_r1); + if (retval != ERROR_OK) + return retval; retval = dpm->instr_write_data_r0(dpm, ARMV4_5_VMOV(0, 1, 0, (num >> 4), (num & 0xf)), value_r0); |