diff options
author | Matthias Welwarsky <matthias@welwarsky.de> | 2015-10-16 09:25:25 +0200 |
---|---|---|
committer | Paul Fertser <fercerpav@gmail.com> | 2015-11-30 05:40:57 +0000 |
commit | 8704e53665910ba71e5bc3f99b32ead0060e1a3e (patch) | |
tree | 0be18ed0939e0905f1e23ef02c7fe7ebc3590da7 /src/target/armv7a_cache.h | |
parent | 3a292a1f34586b265b92e4662652683645e14201 (diff) | |
download | riscv-openocd-8704e53665910ba71e5bc3f99b32ead0060e1a3e.zip riscv-openocd-8704e53665910ba71e5bc3f99b32ead0060e1a3e.tar.gz riscv-openocd-8704e53665910ba71e5bc3f99b32ead0060e1a3e.tar.bz2 |
armv7a: fix handling of inner caches
ARMv7 architecture allows up to 7 cache levels that are architecturally
visible, as opposed to "system caches", which are outside of the domain
defined by ARMv7 and require separate management. This patch enables
detection and identification of caches at all levels. It also implements
a new "flush-all" function that cleans & invalidates all cache levels to
the "Point of Coherence".
Change-Id: Ib77115d6044d39845907941c6f031e208f6e0aa5
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3024
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'src/target/armv7a_cache.h')
-rw-r--r-- | src/target/armv7a_cache.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/target/armv7a_cache.h b/src/target/armv7a_cache.h index e14177b..0efdab7 100644 --- a/src/target/armv7a_cache.h +++ b/src/target/armv7a_cache.h @@ -30,4 +30,9 @@ int armv7a_cache_auto_flush_all_data(struct target *target); extern const struct command_registration arm7a_cache_command_handlers[]; +/* CLIDR cache types */ +#define CACHE_LEVEL_HAS_UNIFIED_CACHE 0x4 +#define CACHE_LEVEL_HAS_D_CACHE 0x2 +#define CACHE_LEVEL_HAS_I_CACHE 0x1 + #endif |