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| author | Antonio Borneo <borneo.antonio@gmail.com> | 2020-07-12 20:25:00 +0200 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-07-26 23:09:45 +0100 |
| commit | 480ba8ca88e3f12bb60498b35de5fc4b74d0511d (patch) | |
| tree | 0c9c94ca50a5e8861596acead9acdf53b1adf04d /src/target/armv7a_cache.c | |
| parent | 3e6f4f8b213ce2c61b052b16606cfc81ba6d7cc4 (diff) | |
| download | riscv-openocd-480ba8ca88e3f12bb60498b35de5fc4b74d0511d.zip riscv-openocd-480ba8ca88e3f12bb60498b35de5fc4b74d0511d.tar.gz riscv-openocd-480ba8ca88e3f12bb60498b35de5fc4b74d0511d.tar.bz2 | |
target: fix minor typos and duplicated words
Change-Id: I8deb0017dc66a243e3dd51e285aa086db500decd
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5766
Tested-by: jenkins
Diffstat (limited to 'src/target/armv7a_cache.c')
| -rw-r--r-- | src/target/armv7a_cache.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c index 921ba9b..e5f1fb0 100644 --- a/src/target/armv7a_cache.c +++ b/src/target/armv7a_cache.c @@ -409,7 +409,7 @@ int armv7a_cache_flush_virt(struct target *target, uint32_t virt, * We assume that target core was chosen correctly. It means if same data * was handled by two cores, other core will loose the changes. Since it * is impossible to know (FIXME) which core has correct data, keep in mind - * that some kind of data lost or korruption is possible. + * that some kind of data lost or corruption is possible. * Possible scenario: * - core1 loaded and changed data on 0x12345678 * - we halted target and modified same data on core0 @@ -577,7 +577,7 @@ const struct command_registration arm7a_l1_di_cache_group_handlers[] = { .name = "info", .handler = arm7a_l1_cache_info_cmd, .mode = COMMAND_ANY, - .help = "print cache realted information", + .help = "print cache related information", .usage = "", }, { |