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author | Dongxue Zhang <elta.era@gmail.com> | 2013-09-23 16:27:03 +0800 |
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committer | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2017-02-10 13:50:17 +0100 |
commit | 47b8cf84202bf792cf66fbfa01169e9592236b8a (patch) | |
tree | d1935dde99235aa94963fbf51b0f8f59f52398d1 /src/target/armv4_5.c | |
parent | 0ecee8326608a070b476a757cf517d0f50b5ca07 (diff) | |
download | riscv-openocd-47b8cf84202bf792cf66fbfa01169e9592236b8a.zip riscv-openocd-47b8cf84202bf792cf66fbfa01169e9592236b8a.tar.gz riscv-openocd-47b8cf84202bf792cf66fbfa01169e9592236b8a.tar.bz2 |
target: Add 64-bit target address support
Define a target_addr_t type to support 32-bit and 64-bit addresses at
the same time. Also define matching TARGET_PRI*ADDR format macros as
well as a convenient TARGET_ADDR_FMT.
In targets that are 32-bit (avr32, nds32, arm7/9/11, fm4, xmc1000)
be least invasive by leaving the formatting unchanged apart from the
type;
for generic code adopt TARGET_ADDR_FMT as unified address format.
Don't silently change gdb formatting here, leave that to later.
Add COMMAND_PARSE_ADDRESS() macro to abstract the address type.
Implement it using its own parse_target_addr() function, in the hopes
of catching pointer type mismatches better.
Add '--disable-target64' configure option to revert to previous 32-bit
target address behavior.
Change-Id: I2e91d205862ceb14f94b3e72a7e99ee0373a85d5
Signed-off-by: Dongxue Zhang <elta.era@gmail.com>
Signed-off-by: David Ung <david.ung.42@gmail.com>
[AF: Default to enabling (Paul Fertser), rename macros, simplify]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Diffstat (limited to 'src/target/armv4_5.c')
-rw-r--r-- | src/target/armv4_5.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 624a254..2029ca9 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -816,7 +816,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command) } struct arm *arm = target_to_arm(target); - uint32_t address; + target_addr_t address; int count = 1; int thumb = 0; @@ -840,7 +840,7 @@ COMMAND_HANDLER(handle_arm_disassemble_command) COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], count); /* FALL THROUGH */ case 1: - COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address); + COMMAND_PARSE_ADDRESS(CMD_ARGV[0], address); if (address & 0x01) { if (!thumb) { command_print(CMD_CTX, "Disassemble as Thumb"); @@ -1434,8 +1434,8 @@ int armv4_5_run_algorithm(struct target *target, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, - uint32_t entry_point, - uint32_t exit_point, + target_addr_t entry_point, + target_addr_t exit_point, int timeout_ms, void *arch_info) { @@ -1444,8 +1444,8 @@ int armv4_5_run_algorithm(struct target *target, mem_params, num_reg_params, reg_params, - entry_point, - exit_point, + (uint32_t)entry_point, + (uint32_t)exit_point, timeout_ms, arch_info, armv4_5_run_algorithm_completion); @@ -1456,7 +1456,7 @@ int armv4_5_run_algorithm(struct target *target, * */ int arm_checksum_memory(struct target *target, - uint32_t address, uint32_t count, uint32_t *checksum) + target_addr_t address, uint32_t count, uint32_t *checksum) { struct working_area *crc_algorithm; struct arm_algorithm arm_algo; @@ -1529,7 +1529,7 @@ cleanup: * */ int arm_blank_check_memory(struct target *target, - uint32_t address, uint32_t count, uint32_t *blank, uint8_t erased_value) + target_addr_t address, uint32_t count, uint32_t *blank, uint8_t erased_value) { struct working_area *check_algorithm; struct reg_param reg_params[3]; |