diff options
| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2016-11-23 10:15:50 +0100 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2016-12-08 12:25:35 +0000 |
| commit | 0a2f1b29e678c97c7981090f769e841cbd583442 (patch) | |
| tree | 432a69e74e48c8e6dbe96194c348d3d0e9d81ccc /src/target/arm_dpm.h | |
| parent | 53a936afc0092f4a65975d35bab0e10944fad3db (diff) | |
| download | riscv-openocd-0a2f1b29e678c97c7981090f769e841cbd583442.zip riscv-openocd-0a2f1b29e678c97c7981090f769e841cbd583442.tar.gz riscv-openocd-0a2f1b29e678c97c7981090f769e841cbd583442.tar.bz2 | |
cortex_a: remove partnum magic from arp_examine and dbginit
Depending on the Debug implementation the "OS Lock" feature might be
implemented or not. It is not actually depending on the part number of the
implemented ARM core but on the DBGOSLSR.OSLM bits. This patch removes
querying the part number and implements proper parsing of OSLM. Result is
a more generic approach that will work out-of-box on more devices.
Change-Id: I79e052869c2f9af1d7fdedef42faddb7292e7332
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3213
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'src/target/arm_dpm.h')
| -rw-r--r-- | src/target/arm_dpm.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h index fa87baf..bbcae78 100644 --- a/src/target/arm_dpm.h +++ b/src/target/arm_dpm.h @@ -198,4 +198,25 @@ void arm_dpm_report_wfar(struct arm_dpm *, uint32_t wfar); void arm_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dcsr); +/* PRCR (Device Power-down and Reset Control Register) bits */ +#define PRCR_DEBUG_NO_POWER_DOWN (1 << 0) +#define PRCR_WARM_RESET (1 << 1) +#define PRCR_HOLD_NON_DEBUG_RESET (1 << 2) + +/* PRSR (Device Power-down and Reset Status Register) bits */ +#define PRSR_POWERUP_STATUS (1 << 0) +#define PRSR_STICKY_POWERDOWN_STATUS (1 << 1) +#define PRSR_RESET_STATUS (1 << 2) +#define PRSR_STICKY_RESET_STATUS (1 << 3) +#define PRSR_HALTED (1 << 4) /* v7.1 Debug only */ +#define PRSR_OSLK (1 << 5) /* v7.1 Debug only */ +#define PRSR_DLK (1 << 6) /* v7.1 Debug only */ + +/* OSLSR (OS Lock Status Register) bits */ +#define OSLSR_OSLM0 (1 << 0) +#define OSLSR_OSLK (1 << 1) +#define OSLSR_nTT (1 << 2) +#define OSLSR_OSLM1 (1 << 3) +#define OSLSR_OSLM (OSLSR_OSLM0|OSLSR_OSLM1) + #endif /* OPENOCD_TARGET_ARM_DPM_H */ |