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| author | Tomas Vanek <vanekt@fbl.cz> | 2018-02-23 00:03:20 +0100 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-04-07 20:31:37 +0100 |
| commit | 414213a5ead0e34dec7f72748dbd5c721cb92c09 (patch) | |
| tree | a57948de1a90c3760bfbf77368f14246eaf15d6f /src/target/arm_dap.c | |
| parent | 2e2bb14b276f5bd973308dcfabd1b8018e187243 (diff) | |
| download | riscv-openocd-414213a5ead0e34dec7f72748dbd5c721cb92c09.zip riscv-openocd-414213a5ead0e34dec7f72748dbd5c721cb92c09.tar.gz riscv-openocd-414213a5ead0e34dec7f72748dbd5c721cb92c09.tar.bz2 | |
target/arm_adi_v5: extend apcsw command to accept arbitrary bits
apcsw command was limited to SPROT bit only.
Now user can manipulate any bit except size and addrinc fields.
Can be used e.g. to set bus signal 'cacheable' on Cortex-M7
Change-Id: Ia1c22b208e46d1653136f6faa5a7aaab036de7aa
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4431
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src/target/arm_dap.c')
| -rw-r--r-- | src/target/arm_dap.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/arm_dap.c b/src/target/arm_dap.c index 797feb5..8c08180 100644 --- a/src/target/arm_dap.c +++ b/src/target/arm_dap.c @@ -55,6 +55,8 @@ static void dap_instance_init(struct adiv5_dap *dap) dap->ap[i].memaccess_tck = 255; /* Number of bits for tar autoincrement, impl. dep. at least 10 */ dap->ap[i].tar_autoincr_block = (1<<10); + /* default CSW value */ + dap->ap[i].csw_default = CSW_DEFAULT; } INIT_LIST_HEAD(&dap->cmd_journal); } |