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| author | Liviu Ionescu <ilg@livius.net> | 2018-05-13 18:39:06 +0300 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-06-04 09:16:08 +0100 |
| commit | 2517bae6c1438350255dca63e7d1c1e06c64b6bb (patch) | |
| tree | 707cce397bf68d1fd040f7f2a4c17e722257fdcd /src/target/arm.h | |
| parent | cdf1e826eb23c29de1019ce64125f644f01b0afe (diff) | |
| download | riscv-openocd-2517bae6c1438350255dca63e7d1c1e06c64b6bb.zip riscv-openocd-2517bae6c1438350255dca63e7d1c1e06c64b6bb.tar.gz riscv-openocd-2517bae6c1438350255dca63e7d1c1e06c64b6bb.tar.bz2 | |
Rework/update ARM semihosting
In 2016, ARM released the second edition of the semihosting specs
("Semihosting for AArch32 and AArch64"), adding support for 64-bits.
To ease the reuse of the semihosting logic for other platforms
(like RISC-V), the semihosting code was isolated from the ARM
target and updated to the latest specs.
The new code is already in use since January (in GNU MCU Eclipse
OpenOCD) and no problems were reported, neither for ARM nor for
RISC-V targets, after more than 7K downloads.
The 2 new files were formatted with uncrustify.
Change-Id: Ie84dbd86a547323bb8a5d24eab68fc7dad013d96
Signed-off-by: Liviu Ionescu <ilg@livius.net>
Reviewed-on: http://openocd.zylin.com/4518
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src/target/arm.h')
| -rw-r--r-- | src/target/arm.h | 25 |
1 files changed, 3 insertions, 22 deletions
diff --git a/src/target/arm.h b/src/target/arm.h index dd25d53..316ff9a 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -8,6 +8,9 @@ * Copyright (C) 2009 by Øyvind Harboe * oyvind.harboe@zylin.com * + * Copyright (C) 2018 by Liviu Ionescu + * <ilg@livius.net> + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or @@ -28,7 +31,6 @@ #include <helper/command.h> #include "target.h" - /** * @file * Holds the interface to ARM cores. @@ -181,32 +183,11 @@ struct arm { /** Flag reporting armv6m based core. */ bool is_armv6m; - /** Flag reporting whether semihosting is active. */ - bool is_semihosting; - - /** Flag reporting whether semihosting fileio is active. */ - bool is_semihosting_fileio; - - /** Flag reporting whether semihosting fileio operation is active. */ - bool semihosting_hit_fileio; - /** Floating point or VFP version, 0 if disabled. */ int arm_vfp_version; - /** Current semihosting operation. */ - int semihosting_op; - - /** Current semihosting result. */ - int semihosting_result; - - /** Value to be returned by semihosting SYS_ERRNO request. */ - int semihosting_errno; - int (*setup_semihosting)(struct target *target, int enable); - /** Semihosting command line. */ - char *semihosting_cmdline; - /** Backpointer to the target. */ struct target *target; |