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| author | Tomas Vanek <vanekt@fbl.cz> | 2017-06-15 08:59:01 +0200 |
|---|---|---|
| committer | Andreas Fritiofson <andreas.fritiofson@gmail.com> | 2018-01-05 10:06:30 +0000 |
| commit | 4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f (patch) | |
| tree | 396d527e5f8ae0dce14d2a14a8c4000f8137a86d /src/target/adi_v5_swd.c | |
| parent | ada631cc5ff09e20a245fdca1afd4064be5eaa3d (diff) | |
| download | riscv-openocd-4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f.zip riscv-openocd-4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f.tar.gz riscv-openocd-4553abf9064fe3c0e4ea2ed29a1d2217df74ff5f.tar.bz2 | |
arm_adi_v5: fix wrong addressing after change of CSW_ADDRINC
Problem: If the same memory location is accessed alternatively
by MEM-AP banked data registers without autoincrement and by standard
autoincremented read/write, TAR register is not updated correctly.
How to replicate: On a Cortex-M issue
mdw 0xe000edf0
multiple times. When poll is on (poll reads the same memory location)
only the first read is correct.
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 20002640
0xe000edf0: 01000000
0xe000edf0: 00000000
0xe000edf0: 00000000
No problems with poll off.
0xe000edf0: 01000000
0xe000edf0: 01000000
0xe000edf0: 01000000
mem_ap_setup_tar() writes to MEM_AP_REG_TAR if requested TAR value
changed or CSW_ADDRINC_... is currently active.
However if an autoincremented access has been issued and autoinc
switched off in CSW afterwards, TAR does not get updated.
The change introduces mem_ap_update_tar_cache() which is called
after queuing of any access to MEM_AP_REG_DRW. It simulates
TAR increment to keep tar_value in sync with MEM_AP.
Crossing tar autoincrement block boundary invalidates cached value.
mem_ap_write() and mem_ap_read() do not check tar autoincrement
block boundary, mem_ap_setup_tar() is called before each transfer instead.
dap_invalidate_cache() is introduced to ensure invalidation
of all cached values during dap_dp_init() and swd_connect()
Change-Id: I815c2283d2989cffd6ea9a4100ce2f29dc3fb7b4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4162
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'src/target/adi_v5_swd.c')
| -rw-r--r-- | src/target/adi_v5_swd.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/adi_v5_swd.c b/src/target/adi_v5_swd.c index a6aada3..c503f09 100644 --- a/src/target/adi_v5_swd.c +++ b/src/target/adi_v5_swd.c @@ -124,7 +124,7 @@ static int swd_connect(struct adiv5_dap *dap) /* Clear link state, including the SELECT cache. */ dap->do_reconnect = false; - dap->select = DP_SELECT_INVALID; + dap_invalidate_cache(dap); swd_queue_dp_read(dap, DP_DPIDR, &dpidr); |