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| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2018-03-12 16:56:05 +0100 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-03-16 08:58:06 +0000 |
| commit | ffd6b78a2c47d1c15629dc72c71caea30ef8161a (patch) | |
| tree | c2a7f4efa9c41216c1df83878eea904d80ca6e3a /src/target/aarch64.c | |
| parent | 935f0c5cc28a3a2cc627ff25b30d65d8d82ad8c4 (diff) | |
| download | riscv-openocd-ffd6b78a2c47d1c15629dc72c71caea30ef8161a.zip riscv-openocd-ffd6b78a2c47d1c15629dc72c71caea30ef8161a.tar.gz riscv-openocd-ffd6b78a2c47d1c15629dc72c71caea30ef8161a.tar.bz2 | |
aarch64: fix debug entry from EL0
If we enter debug state from EL0, some registers are not accessible.
Temporarily move to EL1H and back to gain access. Also, fix
armv8_dpm_modeswitch() to not immediately restore the previous state
on elevating the privilege level.
Change-Id: Ic2a92109230ff4eb6834c00ef544397a5b7ad56a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4461
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src/target/aarch64.c')
| -rw-r--r-- | src/target/aarch64.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 0630ffb..b586e24 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -1861,7 +1861,7 @@ static int aarch64_write_cpu_memory(struct target *target, if (dscr & (DSCR_ERR | DSCR_SYS_ERROR_PEND)) { /* Abort occurred - clear it and exit */ LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr); - armv8_dpm_handle_exception(dpm); + armv8_dpm_handle_exception(dpm, true); return ERROR_FAIL; } @@ -2080,7 +2080,7 @@ static int aarch64_read_cpu_memory(struct target *target, if (dscr & (DSCR_ERR | DSCR_SYS_ERROR_PEND)) { /* Abort occurred - clear it and exit */ LOG_ERROR("abort occurred - dscr = 0x%08" PRIx32, dscr); - armv8_dpm_handle_exception(dpm); + armv8_dpm_handle_exception(dpm, true); return ERROR_FAIL; } |